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From: Imre Deak <imre.deak@intel.com>
To: ville.syrjala@linux.intel.com
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 12/17] drm/i915: Don't kick the power seqeuncer just to check if we have vdd/panel power
Date: Mon, 27 Oct 2014 19:10:08 +0200	[thread overview]
Message-ID: <1414429808.15865.29.camel@intelbox> (raw)
In-Reply-To: <1413484188-21166-1-git-send-email-ville.syrjala@linux.intel.com>

On Thu, 2014-10-16 at 21:29 +0300, ville.syrjala@linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> If there's no power sequencer assigned to the port currently we can't
> very well have vdd or panel power enabled either. If we would try to
> check that from the pps registers we'd need to pick a power seqeuncer
> and kick it. So let's skip the register read and the kick.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_dp.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 74cf827..c9a1600 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -634,6 +634,10 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp)
>  
>  	lockdep_assert_held(&dev_priv->pps_mutex);
>  
> +	if (IS_VALLEYVIEW(dev) &&
> +	    intel_dp->pps_pipe == INVALID_PIPE)
> +		return false;
> +
>  	return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0;
>  }
>  
> @@ -644,6 +648,10 @@ static bool edp_have_panel_vdd(struct intel_dp *intel_dp)
>  
>  	lockdep_assert_held(&dev_priv->pps_mutex);
>  
> +	if (IS_VALLEYVIEW(dev) &&
> +	    intel_dp->pps_pipe == INVALID_PIPE)
> +		return false;
> +

During resume this makes intel_edp_panel_vdd_sanitize() think VDD is
off, though it could be left on by the BIOS. But AFAICS the above makes
also sure that VDD refcounting won't get broken even in this case. The
only issue I see is that VDD will be enabled when it was already on,
which has some overhead, but I don't think that's a priority for now.

>  	return I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD;
>  }
>  

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  reply	other threads:[~2014-10-27 17:13 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-10-16 18:27 [PATCH 00/17] drm/i915: Fix vlv/chv panel power sequencer ville.syrjala
2014-10-16 18:27 ` [PATCH 01/17] drm/i915: Warn if trying to register eDP on port != B/C on vlv/chv ville.syrjala
2014-10-17  9:47   ` Jani Nikula
2014-10-17 11:28     ` Ville Syrjälä
2014-10-17 17:26     ` Mika Kuoppala
2014-10-21 15:42       ` Daniel Vetter
2014-10-16 18:27 ` [PATCH 02/17] drm/i915: Warn if stealing power sequencer from an active eDP port ville.syrjala
2014-10-28  8:10   ` Daniel Vetter
2014-10-28  8:14     ` Ville Syrjälä
2014-10-28  8:34       ` Daniel Vetter
2014-10-28  9:07         ` Ville Syrjälä
2014-10-28 10:30           ` Daniel Vetter
2014-10-16 18:27 ` [PATCH 03/17] drm/i915: Remove high level intel_edp_vdd_{on, off}() from hpd/detect ville.syrjala
2014-10-16 18:27 ` [PATCH 04/17] drm/i915: Store power sequencer delays in intel_dp ville.syrjala
2014-10-16 18:27 ` [PATCH 05/17] drm/i915: Don't initialize power seqeuencer delays more than once ville.syrjala
2014-10-27 14:43   ` Imre Deak
2014-10-27 14:55     ` Ville Syrjälä
2014-10-28  8:12       ` Daniel Vetter
2014-10-16 18:27 ` [PATCH 06/17] drm/i915: Split power sequencer panel on/off functions to locked and unlocked variants ville.syrjala
2014-10-16 18:27 ` [PATCH 07/17] drm/i915: Hold the pps mutex across the whole panel power enable sequence ville.syrjala
2014-10-16 18:27 ` [PATCH 08/17] drm/i915: Wait for PHY port ready before link training on VLV/CHV ville.syrjala
2014-10-22 15:10   ` Todd Previte
2014-10-28  8:15     ` Daniel Vetter
2014-11-04 21:58       ` Todd Previte
2014-10-16 18:27 ` [PATCH 09/17] drm/i915: Fix eDP link training when switching pipes " ville.syrjala
2014-10-16 18:29 ` [PATCH 10/17] drm/i915: Kick the power sequencer before AUX transactions ville.syrjala
2014-10-16 18:29 ` [PATCH 11/17] drm/i915: Make sure DPLL is enabled when kicking the power sequencer on VLV/CHV ville.syrjala
2014-10-28  8:22   ` Daniel Vetter
2014-10-28  8:27     ` Ville Syrjälä
2014-10-28  8:55   ` [PATCH v2 " ville.syrjala
2014-10-28 11:20     ` [PATCH v3 " ville.syrjala
2014-10-16 18:29 ` [PATCH 12/17] drm/i915: Don't kick the power seqeuncer just to check if we have vdd/panel power ville.syrjala
2014-10-27 17:10   ` Imre Deak [this message]
2014-10-28  8:03     ` Ville Syrjälä
2014-10-28  8:07       ` Daniel Vetter
2014-10-28  8:26       ` Daniel Vetter
2014-10-16 18:29 ` [PATCH 13/17] drm/i915: Clear PPS port select when giving up the power sequencer ville.syrjala
2014-10-16 18:29 ` [PATCH 14/17] drm/i915: Warn if stealing non pipe A/B " ville.syrjala
2014-10-16 18:29 ` [PATCH 15/17] drm/i915: Steal power sequencer in vlv_power_sequencer_pipe() ville.syrjala
2014-10-28  8:30   ` Daniel Vetter
2014-10-16 18:30 ` [PATCH 16/17] drm/i915: Improve VDD/PPS debugs ville.syrjala
2014-10-16 18:30 ` [PATCH 17/17] drm/i915: Warn if panel power is already on when enabling it ville.syrjala
2014-10-27 17:56 ` [PATCH 00/17] drm/i915: Fix vlv/chv panel power sequencer Imre Deak
2014-10-28  8:32   ` Daniel Vetter

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