Re: [PATCH 35/89] drm/i915/skl: Implement Wa4x4STCOptimizationDisable:skl

Damien Lespiau
2014-09-22T13:49:30Z

On Wed, Sep 17, 2014 at 12:00:39PM -0700, Rodrigo Vivi wrote:
> Although I believe that we could have a init_workaround function for skl
> as we have for bdw and chv

FWIW, the W/A code is in a confusing state right now, with at least two
people working on it. I'd like to wait a bit before things settle and
have a full W/A pass at that point.

--
Damien

> On Wed, Sep 17, 2014 at 12:00 PM, Rodrigo Vivi <rodrigo.vivi@gmail.com>
> wrote:
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> On Thu, Sep 4, 2014 at 4:27 AM, Damien Lespiau
> <damien.lespiau@intel.com> wrote:
>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> 1 file changed, 4 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c
> b/drivers/gpu/drm/i915/intel_pm.c
> index 0dc148c..c38baea 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -76,6 +76,10 @@ static void gen9_init_clock_gating(struct
> drm_device *dev)
> */
> I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +
> + /* Wa4x4STCOptimizationDisable:skl */
> + I915_WRITE(CACHE_MODE_1,
> +
> _MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
> }
>
> static void i8xx_disable_fbc(struct drm_device *dev)
> --
> 1.8.3.1
>
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>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
>
>
> --
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
>