Re: [PATCH 86/89] drm/i915: only reset media, blt, and render engines on GPU hangs

Jani Nikula
2014-09-04T12:04:44Z

On Thu, 04 Sep 2014, Damien Lespiau <damien.lespiau@intel.com> wrote:
> From: Jesse Barnes <jbarnes@virtuousgeek.org>
>
> No need to mess with display.

Why is this patch part of the skl enabling series? The commit message is
a bit thin on the details too...

BR,
Jani.

>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index ce1214b..29aa63e 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -1472,7 +1472,8 @@ static int gen6_do_reset(struct drm_device *dev)
> * for fifo space for the write or forcewake the chip for
> * the read
> */
> - __raw_i915_write32(dev_priv, GEN6_GDRST, GEN6_GRDOM_FULL);
> + __raw_i915_write32(dev_priv, GEN6_GDRST, GEN6_GRDOM_MEDIA |
> + GEN6_GRDOM_BLT | GEN6_GRDOM_RENDER);
>
> /* Spin waiting for the device to ack the reset request */
> ret = wait_for((__raw_i915_read32(dev_priv, GEN6_GDRST) & GEN6_GRDOM_FULL) == 0, 500);
> --
> 1.8.3.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

--
Jani Nikula, Intel Open Source Technology Center