From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: sanitize RPS resetting during GPU reset
Date: Thu, 27 Nov 2014 13:08:58 +0200 [thread overview]
Message-ID: <1417086538.31087.1.camel@intelbox> (raw)
In-Reply-To: <1416517308-12934-2-git-send-email-imre.deak@intel.com>
On Thu, 2014-11-20 at 23:01 +0200, Imre Deak wrote:
> Atm, we don't disable RPS interrupts and related work items before
> resetting the GPU. This may interfere with the following GPU
> initialization and cause RPS interrupts to show up in PM_IIR too early
> before calling gen6_enable_rps_interrupts() (triggering a WARN there).
>
> Solve this by disabling RPS interrupts and flushing any related work
> items before resetting the GPU.
>
> Reported-by: He, Shuang <shuang.he@intel.com>
> Testcase: igt/gem_reset_stats/ban-render
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=86644
> ---
> drivers/gpu/drm/i915/i915_drv.c | 5 ++++-
> drivers/gpu/drm/i915/intel_pm.c | 14 +++++++++++++-
> 2 files changed, 17 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1df4079..93f3df8 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -810,6 +810,9 @@ int i915_reset(struct drm_device *dev)
> if (!i915.reset)
> return 0;
>
> + if (drm_core_check_feature(dev, DRIVER_MODESET))
> + intel_reset_gt_powersave(dev);
> +
> mutex_lock(&dev->struct_mutex);
>
> i915_gem_reset(dev);
> @@ -879,7 +882,7 @@ int i915_reset(struct drm_device *dev)
> * of re-init after reset.
> */
> if (INTEL_INFO(dev)->gen > 5)
> - intel_reset_gt_powersave(dev);
> + intel_enable_gt_powersave(dev);
> } else {
> mutex_unlock(&dev->struct_mutex);
> }
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index e361014..9417f8f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6316,8 +6316,20 @@ void intel_reset_gt_powersave(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
>
> + if (INTEL_INFO(dev)->gen < 6)
> + return;
> +
> + flush_delayed_work(&dev_priv->rps.delayed_resume_work);
> +
> + /*
> + * TODO: disable RPS interrupts on GEN9+ too once RPS support
> + * is added for it.
> + */
> + if (INTEL_INFO(dev)->gen < 9)
> + gen6_disable_rps_interrupts(dev);
> +
> dev_priv->rps.enabled = false;
> - intel_enable_gt_powersave(dev);
> +
> }
>
> static void ibx_init_clock_gating(struct drm_device *dev)
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next prev parent reply other threads:[~2014-11-27 11:09 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-11-20 21:01 [PATCH 1/2] drm/i915: mask RPS IRQs properly when disabling RPS Imre Deak
2014-11-20 21:01 ` [PATCH 2/2] drm/i915: sanitize RPS resetting during GPU reset Imre Deak
2014-11-22 23:17 ` [PATCH 2/2] drm/i915: sanitize RPS resetting during GPU shuang.he
2014-11-27 11:08 ` Imre Deak [this message]
2014-11-27 19:07 ` [PATCH 2/2] drm/i915: sanitize RPS resetting during GPU reset Daniel Vetter
2014-11-27 19:26 ` Imre Deak
2014-12-01 17:35 ` Paulo Zanoni
2014-12-01 16:29 ` [PATCH 1/2] drm/i915: mask RPS IRQs properly when disabling RPS Paulo Zanoni
2014-12-01 16:34 ` Chris Wilson
2014-12-01 16:47 ` Paulo Zanoni
2014-12-01 17:13 ` Imre Deak
2014-12-01 17:26 ` Daniel Vetter
2014-12-01 16:42 ` Imre Deak
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