From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: Re: [PATCH 1/2] drm/i915: mask RPS IRQs properly when disabling RPS Date: Mon, 01 Dec 2014 19:13:08 +0200 Message-ID: <1417453988.11576.14.camel@intelbox> References: <1416517308-12934-1-git-send-email-imre.deak@intel.com> <20141201163419.GC18921@nuc-i3427.alporthouse.com> Reply-To: imre.deak@intel.com Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id 3EF086E0B1 for ; Mon, 1 Dec 2014 09:13:50 -0800 (PST) In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Paulo Zanoni Cc: Intel Graphics Development List-Id: intel-gfx@lists.freedesktop.org T24gTW9uLCAyMDE0LTEyLTAxIGF0IDE0OjQ3IC0wMjAwLCBQYXVsbyBaYW5vbmkgd3JvdGU6Cj4g MjAxNC0xMi0wMSAxNDozNCBHTVQtMDI6MDAgQ2hyaXMgV2lsc29uIDxjaHJpc0BjaHJpcy13aWxz b24uY28udWs+Ogo+ID4gT24gTW9uLCBEZWMgMDEsIDIwMTQgYXQgMDI6Mjk6MTFQTSAtMDIwMCwg UGF1bG8gWmFub25pIHdyb3RlOgo+ID4+IDIwMTQtMTEtMjAgMTk6MDEgR01ULTAyOjAwIEltcmUg RGVhayA8aW1yZS5kZWFrQGludGVsLmNvbT46Cj4gPj4gPiBBdG0sIGlndC9nZW1fcmVzZXRfc3Rh dHMgY2FuIHRyaWdnZXIgdGhlIHJlY2VudGx5IGFkZGVkIFdBUk4gb24KPiA+PiA+IGxlZnQtb3Zl ciBQTV9JSVIgYml0cyBpbiBnZW42X2VuYWJsZV9ycHNfaW50ZXJydXB0cygpLiBUaGVyZSBhcmUg dHdvCj4gPj4gPiByZWFzb25zIGZvciB0aGlzOgo+ID4+ID4gMS4gd2UgY2FsbCBpbnRlbF9lbmFi bGVfZ3RfcG93ZXJzYXZlKCkgd2l0aG91dCBhIHByZWNlZWRpbmcKPiA+PiA+ICAgIGludGVsX2Rp c2FibGVfZ3RfcG93ZXJzYXZlKCkKPiA+PiA+IDIuIGdlbjZfZGlzYWJsZV9ycHNfaW50ZXJydXB0 cygpIGRvZXNuJ3QgbWFzayBpbnRlcnJ1cHRzIGluIFBNX0lNUgo+ID4+Cj4gPj4gV2UgZG9uJ3Qg ZG8gdGhpcywgYnV0IHdlIG1hc2sgc3R1ZmYgdGhyb3VnaCBHRU42X1BNSU5UUk1TSy4gU2hvdWxk bid0Cj4gPj4gdGhpcyBiZSBlbm91Z2ggdG8gcHJldmVudCBJSVIgZnJvbSBjaGFuZ2luZz8KPiA+ Pgo+ID4+IENocmlzPwo+ID4KPiA+IEl0IHNob3VsZC4gV2Ugc2hvdWxkIGJlIGRvaW5nIGJvdGgg cmVhbGx5LCB1c2UgUE1fSU1SIHRvIHRyZWF0Cj4gPiBJTVIvSUlSL0lFUiBjb25zaXN0ZW50bHkg d2l0aCBvdGhlciBpbnRlcnJ1cHRzLCBhbmQgdXNlIHRoZSBzcGVjaWFsCj4gPiBQTUlOVFJNQVNL IGFzIHBhcnQgb2YgcnBzIHBvd2VyIHR1bmluZy4KPiAKPiBJbiB0aGF0IGNhc2U6IFJldmlld2Vk LWJ5OiBQYXVsbyBaYW5vbmkgPHBhdWxvLnIuemFub25pQGludGVsLmNvbT4KPiAKPiBCdXQgb25l IHRoaW5nIG1ha2VzIG1lIHdvbmRlcjogd2UgZGlzYWJsZSBJRVIgb24KPiBnZW42X2Rpc2FibGVf cnBzX2ludGVycnVwdHMgYnV0IG5ldmVyIHNlZW0gdG8gZW5hYmxlIGl0IGFnYWluIChleGNlcHQK PiBmb3IgdGhlIHVzdWFsIHByZS9wb3N0L3VuaW5zdGFsbCBmdW5jdGlvbnMpLi4uIEkga25vdyBp dCBpcyBub3QgYQo+IHByb2JsZW0gaW50cm9kdWNlZCBieSB0aGlzIHBhdGNoLCBidXQgc2hvdWxk bid0IHRoaXMgYmUgYSBwcm9ibGVtIHRvbz8KClllcywgaXQgaXMgYSBwcm9ibGVtLCBJIGhhdmVu J3Qgbm90aWNlZCB0aGlzLi4KCkl0IHdhc24ndCBhIHByb2JsZW0gZm9yIHN1c3BlbmQvcmVzdW1l LCBzaW5jZSB0aGVyZSBkdXJpbmcgcmVzdW1lIHdlCmNhbGwgcHJlL3Bvc3RpbnN0YWxsIHdoaWNo IHdpbGwgcmVlbmFibGUgYWxsIFJQUyBpbnRlcnJ1cHRzIGluIElFUiB0b28uCkJ1dCBhZnRlciBw YXRjaCAyLzIsIHdlJ2QgZGlzYWJsZSBSUFMgaW50ZXJydXB0cyBkdXJpbmcgcmVzZXQgY2xlYXJp bmcKSUVSLCBidXQgd291bGRuJ3QgcmUtZW5hYmxlIHRoZW0gaW4gSUVSIGFmdGVyd2FyZHMgaW4K Z2VuNl9lbmFibGVfcnBzX2ludGVycnVwdHMoKS4KClRoZSBzb2x1dGlvbiBpbW8gaXMgdG8gdW5t YXNrIGludGVycnVwdHMgaW4gSUVSIGluCmdlbjZfZW5hYmxlX3Jwc19pbnRlcnJ1cHRzKCksIGFu ZCBsZWF2ZSB0aGVtIGRpc2FibGVkIGluCnByZS9wb3N0aW5zdGFsbC4gSSdsbCBsb29rIGludG8g dGhpcy4KClRoYW5rcywKSW1yZQoKPiAKPiBJIGFsc28gd29uZGVyIGlmIHRoZXJlJ3MgYSB3YXkg dG8gZ3JlYXRseSBzaW1wbGlmeSBhbGwgdGhpcyBSUFMKPiBpbnRlcnJ1cHQgaGFuZGxpbmcuLi4K PiAKPiA+IC1DaHJpcwo+ID4KPiA+IC0tCj4gPiBDaHJpcyBXaWxzb24sIEludGVsIE9wZW4gU291 cmNlIFRlY2hub2xvZ3kgQ2VudHJlCj4gCj4gCj4gCgoKX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhA bGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1h bi9saXN0aW5mby9pbnRlbC1nZngK