* [PATCH] drm/i915: allow requesting the audio power well for all platforms @ 2014-12-05 13:28 Imre Deak 2014-12-05 13:55 ` Imre Deak 2014-12-05 17:09 ` shuang.he 0 siblings, 2 replies; 5+ messages in thread From: Imre Deak @ 2014-12-05 13:28 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula So far we only allowed HSW and BDW to request for the audio power domain, but it is also needed at least on VLV/CHV. There is no need for this restriction, since the power domain->power well mapping should take care of the distinctions between platforms. Spotted-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 8a2bd18..58204ab 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -50,7 +50,7 @@ * present for a given platform. */ -static struct i915_power_domains *hsw_pwr; +static struct i915_power_domains *i915_pwr; #define for_each_power_well(i, power_well, domain_mask, power_domains) \ for (i = 0; \ @@ -1098,10 +1098,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) */ if (IS_HASWELL(dev_priv->dev)) { set_power_wells(power_domains, hsw_power_wells); - hsw_pwr = power_domains; } else if (IS_BROADWELL(dev_priv->dev)) { set_power_wells(power_domains, bdw_power_wells); - hsw_pwr = power_domains; } else if (IS_CHERRYVIEW(dev_priv->dev)) { set_power_wells(power_domains, chv_power_wells); } else if (IS_VALLEYVIEW(dev_priv->dev)) { @@ -1110,6 +1108,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) set_power_wells(power_domains, i9xx_always_on_power_well); } + i915_pwr = power_domains; + return 0; } @@ -1146,7 +1146,7 @@ void intel_power_domains_fini(struct drm_i915_private *dev_priv) * we're going to unload/reload. */ intel_display_set_init_power(dev_priv, true); - hsw_pwr = NULL; + i915_pwr = NULL; } static void intel_power_domains_resume(struct drm_i915_private *dev_priv) @@ -1360,10 +1360,10 @@ int i915_request_power_well(void) { struct drm_i915_private *dev_priv; - if (!hsw_pwr) + if (!i915_pwr) return -ENODEV; - dev_priv = container_of(hsw_pwr, struct drm_i915_private, + dev_priv = container_of(i915_pwr, struct drm_i915_private, power_domains); intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); return 0; @@ -1375,10 +1375,10 @@ int i915_release_power_well(void) { struct drm_i915_private *dev_priv; - if (!hsw_pwr) + if (!i915_pwr) return -ENODEV; - dev_priv = container_of(hsw_pwr, struct drm_i915_private, + dev_priv = container_of(i915_pwr, struct drm_i915_private, power_domains); intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); return 0; @@ -1395,10 +1395,10 @@ int i915_get_cdclk_freq(void) { struct drm_i915_private *dev_priv; - if (!hsw_pwr) + if (!i915_pwr) return -ENODEV; - dev_priv = container_of(hsw_pwr, struct drm_i915_private, + dev_priv = container_of(i915_pwr, struct drm_i915_private, power_domains); return intel_ddi_get_cdclk_freq(dev_priv); -- 1.8.4 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: allow requesting the audio power well for all platforms 2014-12-05 13:28 [PATCH] drm/i915: allow requesting the audio power well for all platforms Imre Deak @ 2014-12-05 13:55 ` Imre Deak 2015-01-26 19:12 ` Rodrigo Vivi 2014-12-05 17:09 ` shuang.he 1 sibling, 1 reply; 5+ messages in thread From: Imre Deak @ 2014-12-05 13:55 UTC (permalink / raw) To: intel-gfx; +Cc: Jani Nikula On Fri, 2014-12-05 at 15:28 +0200, Imre Deak wrote: > So far we only allowed HSW and BDW to request for the audio power > domain, but it is also needed at least on VLV/CHV. There is no need > for this restriction, since the power domain->power well mapping should > take care of the distinctions between platforms. > > Spotted-by: Jani Nikula <jani.nikula@intel.com> > Signed-off-by: Imre Deak <imre.deak@intel.com> > --- > drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++++---------- > 1 file changed, 10 insertions(+), 10 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > index 8a2bd18..58204ab 100644 > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > @@ -50,7 +50,7 @@ > * present for a given platform. > */ > > -static struct i915_power_domains *hsw_pwr; > +static struct i915_power_domains *i915_pwr; > > #define for_each_power_well(i, power_well, domain_mask, power_domains) \ > for (i = 0; \ > @@ -1098,10 +1098,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) > */ > if (IS_HASWELL(dev_priv->dev)) { > set_power_wells(power_domains, hsw_power_wells); > - hsw_pwr = power_domains; > } else if (IS_BROADWELL(dev_priv->dev)) { > set_power_wells(power_domains, bdw_power_wells); > - hsw_pwr = power_domains; > } else if (IS_CHERRYVIEW(dev_priv->dev)) { > set_power_wells(power_domains, chv_power_wells); > } else if (IS_VALLEYVIEW(dev_priv->dev)) { > @@ -1110,6 +1108,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) > set_power_wells(power_domains, i9xx_always_on_power_well); > } > > + i915_pwr = power_domains; > + > return 0; > } > > @@ -1146,7 +1146,7 @@ void intel_power_domains_fini(struct drm_i915_private *dev_priv) > * we're going to unload/reload. */ > intel_display_set_init_power(dev_priv, true); > > - hsw_pwr = NULL; > + i915_pwr = NULL; > } > > static void intel_power_domains_resume(struct drm_i915_private *dev_priv) > @@ -1360,10 +1360,10 @@ int i915_request_power_well(void) > { > struct drm_i915_private *dev_priv; > > - if (!hsw_pwr) > + if (!i915_pwr) > return -ENODEV; > > - dev_priv = container_of(hsw_pwr, struct drm_i915_private, > + dev_priv = container_of(i915_pwr, struct drm_i915_private, > power_domains); > intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); > return 0; > @@ -1375,10 +1375,10 @@ int i915_release_power_well(void) > { > struct drm_i915_private *dev_priv; > > - if (!hsw_pwr) > + if (!i915_pwr) > return -ENODEV; > > - dev_priv = container_of(hsw_pwr, struct drm_i915_private, > + dev_priv = container_of(i915_pwr, struct drm_i915_private, > power_domains); > intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); > return 0; > @@ -1395,10 +1395,10 @@ int i915_get_cdclk_freq(void) > { > struct drm_i915_private *dev_priv; > > - if (!hsw_pwr) > + if (!i915_pwr) > return -ENODEV; Err, we should also WARN and return here for !HAS_DDI. This is used for restoring the audio BCLK M/N values in the HSW/BDW extended mode registers, but there is no corresponding registers on other platforms. > > - dev_priv = container_of(hsw_pwr, struct drm_i915_private, > + dev_priv = container_of(i915_pwr, struct drm_i915_private, > power_domains); > > return intel_ddi_get_cdclk_freq(dev_priv); _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: allow requesting the audio power well for all platforms 2014-12-05 13:55 ` Imre Deak @ 2015-01-26 19:12 ` Rodrigo Vivi 2015-01-26 19:48 ` Imre Deak 0 siblings, 1 reply; 5+ messages in thread From: Rodrigo Vivi @ 2015-01-26 19:12 UTC (permalink / raw) To: Imre Deak; +Cc: Jani Nikula, intel-gfx On Fri, Dec 5, 2014 at 5:55 AM, Imre Deak <imre.deak@intel.com> wrote: > On Fri, 2014-12-05 at 15:28 +0200, Imre Deak wrote: >> So far we only allowed HSW and BDW to request for the audio power >> domain, but it is also needed at least on VLV/CHV. There is no need >> for this restriction, since the power domain->power well mapping should >> take care of the distinctions between platforms. >> >> Spotted-by: Jani Nikula <jani.nikula@intel.com> >> Signed-off-by: Imre Deak <imre.deak@intel.com> >> --- >> drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++++---------- >> 1 file changed, 10 insertions(+), 10 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c >> index 8a2bd18..58204ab 100644 >> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c >> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c >> @@ -50,7 +50,7 @@ >> * present for a given platform. >> */ >> >> -static struct i915_power_domains *hsw_pwr; >> +static struct i915_power_domains *i915_pwr; >> >> #define for_each_power_well(i, power_well, domain_mask, power_domains) \ >> for (i = 0; \ >> @@ -1098,10 +1098,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) >> */ >> if (IS_HASWELL(dev_priv->dev)) { >> set_power_wells(power_domains, hsw_power_wells); >> - hsw_pwr = power_domains; >> } else if (IS_BROADWELL(dev_priv->dev)) { >> set_power_wells(power_domains, bdw_power_wells); >> - hsw_pwr = power_domains; >> } else if (IS_CHERRYVIEW(dev_priv->dev)) { >> set_power_wells(power_domains, chv_power_wells); >> } else if (IS_VALLEYVIEW(dev_priv->dev)) { >> @@ -1110,6 +1108,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) >> set_power_wells(power_domains, i9xx_always_on_power_well); >> } >> >> + i915_pwr = power_domains; >> + >> return 0; >> } >> >> @@ -1146,7 +1146,7 @@ void intel_power_domains_fini(struct drm_i915_private *dev_priv) >> * we're going to unload/reload. */ >> intel_display_set_init_power(dev_priv, true); >> >> - hsw_pwr = NULL; >> + i915_pwr = NULL; >> } >> >> static void intel_power_domains_resume(struct drm_i915_private *dev_priv) >> @@ -1360,10 +1360,10 @@ int i915_request_power_well(void) >> { >> struct drm_i915_private *dev_priv; >> >> - if (!hsw_pwr) >> + if (!i915_pwr) >> return -ENODEV; >> >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private, >> + dev_priv = container_of(i915_pwr, struct drm_i915_private, >> power_domains); >> intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); >> return 0; >> @@ -1375,10 +1375,10 @@ int i915_release_power_well(void) >> { >> struct drm_i915_private *dev_priv; >> >> - if (!hsw_pwr) >> + if (!i915_pwr) >> return -ENODEV; >> >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private, >> + dev_priv = container_of(i915_pwr, struct drm_i915_private, >> power_domains); >> intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); >> return 0; >> @@ -1395,10 +1395,10 @@ int i915_get_cdclk_freq(void) >> { >> struct drm_i915_private *dev_priv; >> >> - if (!hsw_pwr) >> + if (!i915_pwr) >> return -ENODEV; > > Err, we should also WARN and return here for !HAS_DDI. This is used for > restoring the audio BCLK M/N values in the HSW/BDW extended mode > registers, but there is no corresponding registers on other platforms. I was getting this patch for collector but this comment confused me. Should we expect a v2 or get this? > >> >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private, >> + dev_priv = container_of(i915_pwr, struct drm_i915_private, >> power_domains); >> >> return intel_ddi_get_cdclk_freq(dev_priv); > > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Rodrigo Vivi Blog: http://blog.vivi.eng.br _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: allow requesting the audio power well for all platforms 2015-01-26 19:12 ` Rodrigo Vivi @ 2015-01-26 19:48 ` Imre Deak 0 siblings, 0 replies; 5+ messages in thread From: Imre Deak @ 2015-01-26 19:48 UTC (permalink / raw) To: Rodrigo Vivi; +Cc: Jani Nikula, intel-gfx On Mon, 2015-01-26 at 11:12 -0800, Rodrigo Vivi wrote: > On Fri, Dec 5, 2014 at 5:55 AM, Imre Deak <imre.deak@intel.com> wrote: > > On Fri, 2014-12-05 at 15:28 +0200, Imre Deak wrote: > >> So far we only allowed HSW and BDW to request for the audio power > >> domain, but it is also needed at least on VLV/CHV. There is no need > >> for this restriction, since the power domain->power well mapping should > >> take care of the distinctions between platforms. > >> > >> Spotted-by: Jani Nikula <jani.nikula@intel.com> > >> Signed-off-by: Imre Deak <imre.deak@intel.com> > >> --- > >> drivers/gpu/drm/i915/intel_runtime_pm.c | 20 ++++++++++---------- > >> 1 file changed, 10 insertions(+), 10 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c > >> index 8a2bd18..58204ab 100644 > >> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c > >> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c > >> @@ -50,7 +50,7 @@ > >> * present for a given platform. > >> */ > >> > >> -static struct i915_power_domains *hsw_pwr; > >> +static struct i915_power_domains *i915_pwr; > >> > >> #define for_each_power_well(i, power_well, domain_mask, power_domains) \ > >> for (i = 0; \ > >> @@ -1098,10 +1098,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) > >> */ > >> if (IS_HASWELL(dev_priv->dev)) { > >> set_power_wells(power_domains, hsw_power_wells); > >> - hsw_pwr = power_domains; > >> } else if (IS_BROADWELL(dev_priv->dev)) { > >> set_power_wells(power_domains, bdw_power_wells); > >> - hsw_pwr = power_domains; > >> } else if (IS_CHERRYVIEW(dev_priv->dev)) { > >> set_power_wells(power_domains, chv_power_wells); > >> } else if (IS_VALLEYVIEW(dev_priv->dev)) { > >> @@ -1110,6 +1108,8 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv) > >> set_power_wells(power_domains, i9xx_always_on_power_well); > >> } > >> > >> + i915_pwr = power_domains; > >> + > >> return 0; > >> } > >> > >> @@ -1146,7 +1146,7 @@ void intel_power_domains_fini(struct drm_i915_private *dev_priv) > >> * we're going to unload/reload. */ > >> intel_display_set_init_power(dev_priv, true); > >> > >> - hsw_pwr = NULL; > >> + i915_pwr = NULL; > >> } > >> > >> static void intel_power_domains_resume(struct drm_i915_private *dev_priv) > >> @@ -1360,10 +1360,10 @@ int i915_request_power_well(void) > >> { > >> struct drm_i915_private *dev_priv; > >> > >> - if (!hsw_pwr) > >> + if (!i915_pwr) > >> return -ENODEV; > >> > >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private, > >> + dev_priv = container_of(i915_pwr, struct drm_i915_private, > >> power_domains); > >> intel_display_power_get(dev_priv, POWER_DOMAIN_AUDIO); > >> return 0; > >> @@ -1375,10 +1375,10 @@ int i915_release_power_well(void) > >> { > >> struct drm_i915_private *dev_priv; > >> > >> - if (!hsw_pwr) > >> + if (!i915_pwr) > >> return -ENODEV; > >> > >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private, > >> + dev_priv = container_of(i915_pwr, struct drm_i915_private, > >> power_domains); > >> intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO); > >> return 0; > >> @@ -1395,10 +1395,10 @@ int i915_get_cdclk_freq(void) > >> { > >> struct drm_i915_private *dev_priv; > >> > >> - if (!hsw_pwr) > >> + if (!i915_pwr) > >> return -ENODEV; > > > > Err, we should also WARN and return here for !HAS_DDI. This is used for > > restoring the audio BCLK M/N values in the HSW/BDW extended mode > > registers, but there is no corresponding registers on other platforms. > > I was getting this patch for collector but this comment confused me. > Should we expect a v2 or get this? Rodrigo, this patch can be ignored, since we have already the audio component code merged. That one solves this problem too. > > > > >> > >> - dev_priv = container_of(hsw_pwr, struct drm_i915_private, > >> + dev_priv = container_of(i915_pwr, struct drm_i915_private, > >> power_domains); > >> > >> return intel_ddi_get_cdclk_freq(dev_priv); > > > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@lists.freedesktop.org > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH] drm/i915: allow requesting the audio power well for all platforms 2014-12-05 13:28 [PATCH] drm/i915: allow requesting the audio power well for all platforms Imre Deak 2014-12-05 13:55 ` Imre Deak @ 2014-12-05 17:09 ` shuang.he 1 sibling, 0 replies; 5+ messages in thread From: shuang.he @ 2014-12-05 17:09 UTC (permalink / raw) To: shuang.he, intel-gfx, imre.deak Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com) -------------------------------------Summary------------------------------------- Platform Delta drm-intel-nightly Series Applied PNV 364/364 364/364 ILK -2 366/366 364/366 SNB -1 450/450 449/450 IVB +17 481/498 498/498 BYT 289/289 289/289 HSW -1 564/564 563/564 BDW 417/417 417/417 -------------------------------------Detailed------------------------------------- Platform Test drm-intel-nightly Series Applied *ILK igt_kms_flip_rcs-wf_vblank-vs-dpms-interruptible DMESG_WARN(1, M26)PASS(3, M37M26) NSPT(1, M26) *ILK igt_kms_flip_wf_vblank-vs-modeset-interruptible PASS(2, M37M26) DMESG_WARN(1, M26) SNB igt_kms_force_connector NRUN(3, M35M22)PASS(1, M35) NRUN(1, M22) IVB igt_kms_3d DMESG_WARN(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-128x128-onscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-128x128-random NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-128x128-sliding NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-256x256-offscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-256x256-onscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-256x256-sliding NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-64x64-offscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-64x64-onscreen NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-64x64-random NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-64x64-sliding NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_cursor_crc_cursor-size-change NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_fence_pin_leak NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_rotation_crc_primary-rotation NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) IVB igt_kms_rotation_crc_sprite-rotation NSPT(1, M34)PASS(13, M4M34M21) PASS(1, M21) HSW igt_kms_force_connector NRUN(3, M40M19M20)PASS(1, M40) NRUN(1, M19) Note: You need to pay more attention to line start with '*' _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2015-01-26 19:48 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-12-05 13:28 [PATCH] drm/i915: allow requesting the audio power well for all platforms Imre Deak 2014-12-05 13:55 ` Imre Deak 2015-01-26 19:12 ` Rodrigo Vivi 2015-01-26 19:48 ` Imre Deak 2014-12-05 17:09 ` shuang.he
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