Re: [PATCH] drm/i915: vlv: clamp minimum RPS frequency to what Punit allows

[Imre Deak <imre.deak@intel.com>]

On Fri, 2014-12-05 at 21:58 +0100, Daniel Vetter wrote:
> On Thu, Dec 04, 2014 at 06:39:35PM +0200, Imre Deak wrote:
> > As described in the code comment, I couldn't set the minimum RPS
> > frequency on my BYT-M B0 to the minimum allowed as reported by Punit.
> > Fix this by clamping the minimum value to the first one that was
> > accepted on my machine. This fixes at least the pm_rpm basic-api and
> > min-max-config subtests.
> > 
> > Testcase: igt/pm_rps
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> 
> Isn't there a bugzilla for this, too?

I didn't check this:/ There are some that may be fixed, or at least
partially fixed. I just list all pm_rps bugs here, they are all worth
rechecking imo, although the non-VLV/CHV ones are less likely to be
related:

Reference: https://bugs.freedesktop.org/show_bug.cgi?id=80704
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=86654
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=86363
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=84896
Reference: https://bugs.freedesktop.org/show_bug.cgi?id=77869


> -Daniel
> 
> > ---
> >  drivers/gpu/drm/i915/intel_pm.c | 12 +++++++++++-
> >  1 file changed, 11 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 45c786f..7a1112f 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -5039,7 +5039,17 @@ static int valleyview_rps_rpe_freq(struct drm_i915_private *dev_priv)
> >  
> >  static int valleyview_rps_min_freq(struct drm_i915_private *dev_priv)
> >  {
> > -	return vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM) & 0xff;
> > +	u32 val;
> > +
> > +	val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM) & 0xff;
> > +	/*
> > +	 * According to the BYT Punit GPU turbo HAS 1.1.6.3 the minimum value
> > +	 * for the minimum frequency in GPLL mode is 0xc1. Contrary to this on
> > +	 * a BYT-M B0 the above register contains 0xbf. Moreover when setting
> > +	 * a frequency Punit will not allow values below 0xc0. Clamp it 0xc0
> > +	 * to make sure it matches what Punit accepts.
> > +	 */
> > +	return max_t(u32, val, 0xc0);
> >  }
> >  
> >  /* Check that the pctx buffer wasn't move under us. */
> > -- 
> > 1.8.4
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 


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