From mboxrd@z Thu Jan  1 00:00:00 1970
From: Paulo Zanoni <przanoni@gmail.com>
Subject: [PATCH 5/9] drm/i915: don't set the FBC plane select
	bits on HSW+
Date: Tue, 23 Dec 2014 10:35:41 -0200
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RnJvbTogUGF1bG8gWmFub25pIDxwYXVsby5yLnphbm9uaUBpbnRlbC5jb20+CgpUaGlzIGNvbW1p
dCBpcyBqdXN0IHRvIG1ha2UgdGhlIGludGVudGlvbnMgZXhwbGljaXQ6IG9uIEhTVysgdGhlc2UK
Yml0cyBhcmUgTUJaLCBidXQgc2luY2Ugd2Ugb25seSBzdXBwb3J0IHBsYW5lIEEgYW5kIHRoZSBt
YWNybwpldmFsdWF0ZXMgdG8gemVybyB3aGVuIHBsYW5lIEEgaXMgdGhlIHBhcmFtZXRlciwgd2Un
cmUgbm90IGZpeGluZyBhbnkKYnVnLgoKU2lnbmVkLW9mZi1ieTogUGF1bG8gWmFub25pIDxwYXVs
by5yLnphbm9uaUBpbnRlbC5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZmJj
LmMgfCA3ICsrKysrLS0KIDEgZmlsZSBjaGFuZ2VkLCA1IGluc2VydGlvbnMoKyksIDIgZGVsZXRp
b25zKC0pCgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZmJjLmMgYi9k
cml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9mYmMuYwppbmRleCA4M2QzYzhhLi5jNmU2ODhjIDEw
MDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9mYmMuYworKysgYi9kcml2ZXJz
L2dwdS9kcm0vaTkxNS9pbnRlbF9mYmMuYwpAQCAtMjU4LDEyICsyNTgsMTUgQEAgc3RhdGljIHZv
aWQgZ2VuN19mYmNfZW5hYmxlKHN0cnVjdCBkcm1fY3J0YyAqY3J0YykKIAlzdHJ1Y3QgZHJtX2Zy
YW1lYnVmZmVyICpmYiA9IGNydGMtPnByaW1hcnktPmZiOwogCXN0cnVjdCBkcm1faTkxNV9nZW1f
b2JqZWN0ICpvYmogPSBpbnRlbF9mYl9vYmooZmIpOwogCXN0cnVjdCBpbnRlbF9jcnRjICppbnRl
bF9jcnRjID0gdG9faW50ZWxfY3J0YyhjcnRjKTsKLQl1MzIgZHBmY19jdGw7CisJdTMyIGRwZmNf
Y3RsID0gMDsKIAlpbnQgdGhyZXNob2xkID0gZGV2X3ByaXYtPmZiYy50aHJlc2hvbGQ7CiAKIAlk
ZXZfcHJpdi0+ZmJjLmVuYWJsZWQgPSB0cnVlOwogCi0JZHBmY19jdGwgPSBJVkJfRFBGQ19DVExf
UExBTkUoaW50ZWxfY3J0Yy0+cGxhbmUpOworCisJaWYgKElTX0lWWUJSSURHRShkZXYpKQorCQlk
cGZjX2N0bCB8PSBJVkJfRFBGQ19DVExfUExBTkUoaW50ZWxfY3J0Yy0+cGxhbmUpOworCiAJaWYg
KGRybV9mb3JtYXRfcGxhbmVfY3BwKGZiLT5waXhlbF9mb3JtYXQsIDApID09IDIpCiAJCXRocmVz
aG9sZCsrOwogCi0tIAoyLjEuMwoKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f
X19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMuZnJlZWRl
c2t0b3Aub3JnCmh0dHA6Ly9saXN0cy5mcmVlZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9p
bnRlbC1nZngK