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From: Yu Zhang <yu.c.zhang@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: daniel.vetter@ffwll.ch
Subject: [PATCH v4 5/8] drm/i915: Add the display switch logic for vGPU in i915 driver
Date: Tue, 10 Feb 2015 19:05:51 +0800	[thread overview]
Message-ID: <1423566354-5532-6-git-send-email-yu.c.zhang@linux.intel.com> (raw)
In-Reply-To: <1423566354-5532-1-git-send-email-yu.c.zhang@linux.intel.com>

Display switch logic is added to notify the host side that
current vGPU have a valid surface to show. It does so by
writing the display_ready field in PV INFO page, and then
will be handled in the host side. This is useful to avoid
trickiness when the VM's framebuffer is being accessed in
the middle of VM modesetting, e.g. compositing the framebuffer
in the host side.

v2:
        - move the notification code outside the 'else' in load sequence
        - remove the notification code in intel_crtc_set_config()

v4:
        - code rebase, no need to define another dev_priv
        - use #define instead of enum for display readiness

Signed-off-by: Yu Zhang <yu.c.zhang@linux.intel.com>
Signed-off-by: Jike Song <jike.song@intel.com>
Signed-off-by: Zhiyuan Lv <zhiyuan.lv@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c  | 8 ++++++++
 drivers/gpu/drm/i915/i915_vgpu.h | 4 ++++
 2 files changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 1a46787..5804aa5 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -36,6 +36,7 @@
 #include "intel_drv.h"
 #include <drm/i915_drm.h>
 #include "i915_drv.h"
+#include "i915_vgpu.h"
 #include "i915_trace.h"
 #include <linux/pci.h>
 #include <linux/console.h>
@@ -842,6 +843,13 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 		}
 	}
 
+	/*
+	 * Notify a valid surface after modesetting,
+	 * when running inside a VM.
+	 */
+	if (intel_vgpu_active(dev))
+		I915_WRITE(vgtif_reg(display_ready), VGT_DRV_DISPLAY_READY);
+
 	i915_setup_sysfs(dev);
 
 	if (INTEL_INFO(dev)->num_pipes) {
diff --git a/drivers/gpu/drm/i915/i915_vgpu.h b/drivers/gpu/drm/i915/i915_vgpu.h
index 3ed01a7..0db9ccf 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.h
+++ b/drivers/gpu/drm/i915/i915_vgpu.h
@@ -80,6 +80,10 @@ struct vgt_if {
 #define vgtif_reg(x) \
 	(VGT_PVINFO_PAGE + (long)&((struct vgt_if *)NULL)->x)
 
+/* vGPU display status to be used by the host side */
+#define VGT_DRV_DISPLAY_NOT_READY 0
+#define VGT_DRV_DISPLAY_READY     1  /* ready for display switch */
+
 extern void i915_check_vgpu(struct drm_device *dev);
 extern int intel_vgt_balloon(struct drm_device *dev);
 extern void intel_vgt_deballoon(void);
-- 
1.9.1

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  parent reply	other threads:[~2015-02-10 11:39 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-10 11:05 [PATCH v4 0/8] Add enlightenments for vGPU Yu Zhang
2015-02-10 11:05 ` [PATCH v4 1/8] drm/i915: Introduce a PV INFO page structure for Intel GVT-g Yu Zhang
2015-03-11  6:43   ` Dave Airlie
2015-02-10 11:05 ` [PATCH v4 2/8] drm/i915: Adds graphic address space ballooning logic Yu Zhang
2015-02-10 11:05 ` [PATCH v4 3/8] drm/i915: Partition the fence registers for vGPU in i915 driver Yu Zhang
2015-02-10 11:05 ` [PATCH v4 4/8] drm/i915: Disable framebuffer compression for i915 driver in VM Yu Zhang
2015-02-10 11:05 ` Yu Zhang [this message]
2015-02-10 11:05 ` [PATCH v4 6/8] drm/i915: Disable power management " Yu Zhang
2015-02-10 11:05 ` [PATCH v4 7/8] drm/i915: Create vGPU specific MMIO operations to reduce traps Yu Zhang
2015-02-10 11:05 ` [PATCH v4 8/8] drm/i915: Support alias ppgtt in VM if ppgtt is enabled Yu Zhang
2015-02-10 12:11 ` [PATCH v4 0/8] Add enlightenments for vGPU Tvrtko Ursulin
2015-02-11  7:47   ` Yu, Zhang
2015-02-11  8:06   ` Daniel Vetter
2015-02-11  8:12     ` Yu, Zhang

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