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From: Nick Hoath <nicholas.hoath@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 1/3] drm/i915: gen 9 h/w w/a (Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset)
Date: Wed, 18 Feb 2015 15:16:06 +0000	[thread overview]
Message-ID: <1424272568-5920-2-git-send-email-nicholas.hoath@intel.com> (raw)
In-Reply-To: <1424272568-5920-1-git-send-email-nicholas.hoath@intel.com>

Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c | 4 +++-
 drivers/gpu/drm/i915/i915_gem.c | 4 +++-
 2 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 5804aa5..df9a3a5 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -748,7 +748,9 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	 * behaviour if any general state is accessed within a page above 4GB,
 	 * which also needs to be handled carefully.
 	 */
-	if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))
+	/* Wa32bitGeneralStateOffset:skl */
+	if (IS_BROADWATER(dev) || IS_CRESTLINE(dev) ||
+		IS_SKYLAKE(dev))
 		dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));
 
 	aperture_size = dev_priv->gtt.mappable_end;
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index dc10d86..00439b5 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4430,7 +4430,9 @@ struct drm_i915_gem_object *i915_gem_alloc_object(struct drm_device *dev,
 	}
 
 	mask = GFP_HIGHUSER | __GFP_RECLAIMABLE;
-	if (IS_CRESTLINE(dev) || IS_BROADWATER(dev)) {
+	/* Wa32bitInstructionBaseOffset:skl */
+	if (IS_CRESTLINE(dev) || IS_BROADWATER(dev) ||
+			IS_SKYLAKE(dev)) {
 		/* 965gm cannot relocate objects above 4GiB. */
 		mask &= ~__GFP_HIGHMEM;
 		mask |= __GFP_DMA32;
-- 
2.1.1

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  reply	other threads:[~2015-02-18 15:16 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-02-18 15:16 [PATCH 0/3] drm/i915: Further Skylake h/w w/a's Nick Hoath
2015-02-18 15:16 ` Nick Hoath [this message]
2015-02-18 18:19   ` [PATCH 1/3] drm/i915: gen 9 h/w w/a (Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset) Damien Lespiau
2015-02-23 23:34     ` Daniel Vetter
2015-02-18 15:16 ` [PATCH 2/3] drm/i915: gen 9 h/w w/a (WaDisablePooledEuLoadBalancingFix) Nick Hoath
2015-02-18 18:49   ` Damien Lespiau
2015-02-18 15:16 ` [PATCH 3/3] gen 9 h/w w/a (WaClearFlowControlGpgpuContextSave) Nick Hoath
2015-02-18 18:48   ` Damien Lespiau
2015-02-23 23:36     ` Daniel Vetter
2015-02-18 22:24   ` shuang.he

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