From: deepak.s@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 5/5] drm/i915: Setup static bias for GPU
Date: Thu, 26 Feb 2015 20:46:58 +0530 [thread overview]
Message-ID: <1424963818-11931-6-git-send-email-deepak.s@linux.intel.com> (raw)
In-Reply-To: <1424963818-11931-1-git-send-email-deepak.s@linux.intel.com>
From: Deepak S <deepak.s@linux.intel.com>
Based on the spec, Setting up static BIAS for GPU to improve the
rps performace.
Signed-off-by: Deepak S <deepak.s@linux.intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 5 +++++
drivers/gpu/drm/i915/intel_pm.c | 12 ++++++++++++
2 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 55143cb..dd776df 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -662,6 +662,11 @@ enum skl_disp_power_wells {
#define FB_FMAX_VMIN_FREQ_LO_SHIFT 27
#define FB_FMAX_VMIN_FREQ_LO_MASK 0xf8000000
+#define VLV_IOSFB_RPS_OVERRIDE 0x04
+#define VLV_OVERRIDE_RPS_MASK 1
+#define VLV_ENABLE_BIAS_SHARE (1 << 1)
+#define VLV_BIAS_VAL (6 << 2)
+
#define VLV_CZ_CLOCK_TO_MILLI_SEC 100000
#define VLV_RP_UP_EI_THRESHOLD 90
#define VLV_RP_DOWN_EI_THRESHOLD 70
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 7716be9..5bbb047 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4841,6 +4841,12 @@ static void cherryview_enable_rps(struct drm_device *dev)
GEN6_RP_UP_BUSY_AVG |
GEN6_RP_DOWN_IDLE_AVG);
+ /* Setting Fixed Bias */
+ val = VLV_OVERRIDE_RPS_MASK |
+ VLV_ENABLE_BIAS_SHARE |
+ VLV_BIAS_VAL;
+ vlv_punit_write(dev_priv, VLV_IOSFB_RPS_OVERRIDE, val);
+
val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
/* RPS code assumes GPLL is used */
@@ -4951,6 +4957,12 @@ static void valleyview_enable_rps(struct drm_device *dev)
I915_WRITE(GEN6_RC_CONTROL, rc6_mode);
+ /* Setting Fixed Bias */
+ val = VLV_OVERRIDE_RPS_MASK |
+ VLV_ENABLE_BIAS_SHARE |
+ VLV_BIAS_VAL;
+ vlv_punit_write(dev_priv, VLV_IOSFB_RPS_OVERRIDE, val);
+
val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
/* RPS code assumes GPLL is used */
--
1.9.1
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next prev parent reply other threads:[~2015-02-26 15:22 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-02-26 15:16 [PATCH 0/5] CHV PM fix & Improvements deepak.s
2015-02-26 15:16 ` [PATCH 1/5] drm/i915/chv: Remove Wait for a previous gfx force-off deepak.s
2015-02-26 15:43 ` Ville Syrjälä
2015-02-26 15:42 ` Deepak S
2015-03-11 14:50 ` Deepak S
2015-02-26 15:16 ` [PATCH 2/5] drm/i915: Re-adjusting rc6 promotional timer for chv deepak.s
2015-03-23 19:43 ` Paulo Zanoni
2015-03-24 3:05 ` Deepak S
2015-02-26 15:16 ` [PATCH 3/5] drm/i915/chv: Set min freq to efficient frequency on chv deepak.s
2015-02-26 16:12 ` Chris Wilson
2015-03-11 13:53 ` Deepak S
2015-03-11 14:06 ` Chris Wilson
2015-03-11 14:29 ` Deepak S
2015-02-26 15:16 ` [PATCH 4/5] drm/i915: Modifying RC6 Promotion timer for Media workloads deepak.s
2015-02-26 16:08 ` Chris Wilson
2015-02-27 2:53 ` Deepak S
2015-03-05 15:57 ` [PATCH v2] " deepak.s
2015-03-06 16:40 ` Daniel Vetter
2015-03-11 13:37 ` Deepak S
2015-03-11 13:56 ` Chris Wilson
2015-03-11 13:59 ` Deepak S
2015-02-26 15:16 ` deepak.s [this message]
2015-02-28 15:23 ` [PATCH 5/5] drm/i915: Setup static bias for GPU shuang.he
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