From mboxrd@z Thu Jan 1 00:00:00 1970 From: Imre Deak Subject: [PATCH 2/2] drm/i915: move clearing of RPS interrupt bits from disable to reset time Date: Mon, 23 Mar 2015 19:11:35 +0200 Message-ID: <1427130695-5705-2-git-send-email-imre.deak@intel.com> References: <1427130695-5705-1-git-send-email-imre.deak@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTP id 9CE486E5F6 for ; Mon, 23 Mar 2015 10:11:38 -0700 (PDT) In-Reply-To: <1427130695-5705-1-git-send-email-imre.deak@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org VGhlIGxvZ2ljYWwgcGxhY2UgZm9yIGNsZWFyaW5nIHRoZSBSUFMgbGF0Y2hlZCBpbnRlcnJ1cHQg Yml0cyBpcyB3aGVuCnJlc2V0dGluZyB0aGUgUlBTIGludGVycnVwdHMsIHNvIG1vdmUgdGhlIGNv cnJlc3BvbmRpbmcgcGFydCBmcm9tIHRoZSBSUFMKZGlzYWJsZSBmdW5jdGlvbiB0byB0aGUgcmVz ZXQgZnVuY3Rpb24uIER1cmluZyByZXNldHRpbmcgd2UgYWxyZWFkeQpjbGVhcmVkIHRoZSBJSVIg Yml0cywgc28gdGhlIG9ubHkgdGhpbmcgbWlzc2luZyB0aGVyZSB3YXMgY2xlYXJpbmcgcG1faWly LgoKTm90ZSB0aGF0IHdlIGNhbGwgZ2VuNl9kaXNhYmxlX3Jwc19pbnRlcnJ1cHRzKCkgYWxzbyBk dXJpbmcgZHJpdmVyIGxvYWQKYW5kIHJlc3VtZSB0aW1lIHZpYSBpbnRlbF91bmNvcmVfc2FuaXRp emUoKSB3aGVuIGk5MTUgaW50ZXJydXB0cyBhcmUKc3RpbGwgbm90IGluc3RhbGxlZC4gSWYgdGhl cmUgYXJlIGFueSBwZW5kaW5nIFJQUyBiaXRzIGF0IHRoaXMgcG9pbnQKKHdoaWNoIGFmdGVyIHRo aXMgcGF0Y2ggd291bGRuJ3QgYmUgY2xlYXJlZCkgdGhleSB3aWxsIGJlIGNsZWFyZWQgYnkgdGhl CnJlc2V0IGNvZGUgdmlhIHRoZSBpbnRlcnJ1cHQgcHJlaW5zdGFsbCBob29rcy4KClNpZ25lZC1v ZmYtYnk6IEltcmUgRGVhayA8aW1yZS5kZWFrQGludGVsLmNvbT4KLS0tCiBkcml2ZXJzL2dwdS9k cm0vaTkxNS9pOTE1X2lycS5jIHwgMTAgKy0tLS0tLS0tLQogMSBmaWxlIGNoYW5nZWQsIDEgaW5z ZXJ0aW9uKCspLCA5IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9p OTE1L2k5MTVfaXJxLmMgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X2lycS5jCmluZGV4IDdh ZmJkZTQuLjE0ZWNiNGQgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2k5MTVfaXJx LmMKKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEuYwpAQCAtMjc3LDYgKzI3Nyw3 IEBAIHZvaWQgZ2VuNl9yZXNldF9ycHNfaW50ZXJydXB0cyhzdHJ1Y3QgZHJtX2RldmljZSAqZGV2 KQogCUk5MTVfV1JJVEUocmVnLCBkZXZfcHJpdi0+cG1fcnBzX2V2ZW50cyk7CiAJSTkxNV9XUklU RShyZWcsIGRldl9wcml2LT5wbV9ycHNfZXZlbnRzKTsKIAlQT1NUSU5HX1JFQUQocmVnKTsKKwlk ZXZfcHJpdi0+cnBzLnBtX2lpciA9IDA7CiAJc3Bpbl91bmxvY2tfaXJxKCZkZXZfcHJpdi0+aXJx X2xvY2spOwogfQogCkBAIC0zMzQsMTUgKzMzNSw2IEBAIHZvaWQgZ2VuNl9kaXNhYmxlX3Jwc19p bnRlcnJ1cHRzKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpCiAJc3Bpbl91bmxvY2tfaXJxKCZkZXZf cHJpdi0+aXJxX2xvY2spOwogCiAJc3luY2hyb25pemVfaXJxKGRldi0+aXJxKTsKLQotCXNwaW5f bG9ja19pcnEoJmRldl9wcml2LT5pcnFfbG9jayk7Ci0KLQlJOTE1X1dSSVRFKGdlbjZfcG1faWly KGRldl9wcml2KSwgZGV2X3ByaXYtPnBtX3Jwc19ldmVudHMpOwotCUk5MTVfV1JJVEUoZ2VuNl9w bV9paXIoZGV2X3ByaXYpLCBkZXZfcHJpdi0+cG1fcnBzX2V2ZW50cyk7Ci0KLQlkZXZfcHJpdi0+ cnBzLnBtX2lpciA9IDA7Ci0KLQlzcGluX3VubG9ja19pcnEoJmRldl9wcml2LT5pcnFfbG9jayk7 CiB9CiAKIC8qKgotLSAKMi4xLjAKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVk ZXNrdG9wLm9yZwpodHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8v aW50ZWwtZ2Z4Cg==