* [PATCH 1/9] drm/i915: Remove pinned check from madvise_ioctl
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 2/9] drm/i915/vlv: check port in infoframe_enabled v2 Rodrigo Vivi
` (7 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
From: Chris Wilson <chris@chris-wilson.co.uk>
We don't need to incur the overhead of checking whether the object is
pinned prior to changing its madvise. If the object is pinned, the
madvise will not take effect until it is unpinned and so we cannot free
the pages being pointed at by hardware. Marking a pinned object with
allocated pages as DONTNEED will not trigger any undue warnings. The check
is therefore superfluous, and by removing it we can remove a linear walk
over all the vma the object has.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 6 ------
1 file changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9fbc355..de6717e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4371,11 +4371,6 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
goto unlock;
}
- if (i915_gem_obj_is_pinned(obj)) {
- ret = -EINVAL;
- goto out;
- }
-
if (obj->pages &&
obj->tiling_mode != I915_TILING_NONE &&
dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) {
@@ -4394,7 +4389,6 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data,
args->retained = obj->madv != __I915_MADV_PURGED;
-out:
drm_gem_object_unreference(&obj->base);
unlock:
mutex_unlock(&dev->struct_mutex);
--
2.1.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 2/9] drm/i915/vlv: check port in infoframe_enabled v2
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 1/9] drm/i915: Remove pinned check from madvise_ioctl Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-16 9:10 ` Daniel Vetter
2015-04-15 23:52 ` [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg Rodrigo Vivi
` (6 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
From: Jesse Barnes <jbarnes@virtuousgeek.org>
Same as IBX and G4x, they all share the same genetic material.
v2: we all need a bit more port in our lives
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 26222e6..0863f1e 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -324,10 +324,15 @@ static bool vlv_infoframe_enabled(struct drm_encoder *encoder)
struct drm_device *dev = encoder->dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
+ struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
int reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
u32 val = I915_READ(reg);
+ u32 port = intel_dig_port->port;
- return val & VIDEO_DIP_ENABLE;
+ if (port == (val & VIDEO_DIP_PORT_MASK))
+ return val & VIDEO_DIP_ENABLE;
+
+ return false;
}
static void hsw_write_infoframe(struct drm_encoder *encoder,
--
2.1.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 2/9] drm/i915/vlv: check port in infoframe_enabled v2
2015-04-15 23:52 ` [PATCH 2/9] drm/i915/vlv: check port in infoframe_enabled v2 Rodrigo Vivi
@ 2015-04-16 9:10 ` Daniel Vetter
0 siblings, 0 replies; 18+ messages in thread
From: Daniel Vetter @ 2015-04-16 9:10 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Wed, Apr 15, 2015 at 04:52:29PM -0700, Rodrigo Vivi wrote:
> From: Jesse Barnes <jbarnes@virtuousgeek.org>
>
> Same as IBX and G4x, they all share the same genetic material.
>
> v2: we all need a bit more port in our lives
>
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_hdmi.c | 7 ++++++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 26222e6..0863f1e 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -324,10 +324,15 @@ static bool vlv_infoframe_enabled(struct drm_encoder *encoder)
> struct drm_device *dev = encoder->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
> + struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder);
> int reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
> u32 val = I915_READ(reg);
> + u32 port = intel_dig_port->port;
>
> - return val & VIDEO_DIP_ENABLE;
> + if (port == (val & VIDEO_DIP_PORT_MASK))
> + return val & VIDEO_DIP_ENABLE;
> +
> + return false;
> }
>
> static void hsw_write_infoframe(struct drm_encoder *encoder,
> --
> 2.1.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 1/9] drm/i915: Remove pinned check from madvise_ioctl Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 2/9] drm/i915/vlv: check port in infoframe_enabled v2 Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-16 6:45 ` Imre Deak
2015-04-15 23:52 ` [PATCH 4/9] drm/i915: Remove unused head member in request struct Rodrigo Vivi
` (5 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
From: Imre Deak <imre.deak@intel.com>
Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across
suspend/resume, so fix this.
This was introduced in
commit ddeea5b0c36f3665446518c609be91f9336ef674
Author: Imre Deak <imre.deak@intel.com>
Date: Mon May 5 15:19:56 2014 +0300
drm/i915: vlv: add runtime PM support
I noticed this only by reading the code. To my knowledge it shouldn't
cause any real problems at the moment, since the power well backing this
register remains on across a runtime s/r. This may change once
system-wide s0ix functionality is enabled in the kernel.
v2:
- resend after a missing git add -u :/
Signed-off-by: Imre Deak <imre.deak@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c3fdbb0..e179da6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1051,7 +1051,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv)
s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
- s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
+ s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT);
s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
s->ecochk = I915_READ(GAM_ECOCHK);
@@ -1133,7 +1133,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv)
I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
- I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count);
+ I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);
I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
I915_WRITE(GAM_ECOCHK, s->ecochk);
--
2.1.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
2015-04-15 23:52 ` [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg Rodrigo Vivi
@ 2015-04-16 6:45 ` Imre Deak
2015-04-16 9:08 ` Daniel Vetter
0 siblings, 1 reply; 18+ messages in thread
From: Imre Deak @ 2015-04-16 6:45 UTC (permalink / raw)
To: Daniel Vetter; +Cc: intel-gfx, Rodrigo Vivi
On ke, 2015-04-15 at 16:52 -0700, Rodrigo Vivi wrote:
> From: Imre Deak <imre.deak@intel.com>
>
> Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across
> suspend/resume, so fix this.
>
> This was introduced in
>
> commit ddeea5b0c36f3665446518c609be91f9336ef674
> Author: Imre Deak <imre.deak@intel.com>
> Date: Mon May 5 15:19:56 2014 +0300
>
> drm/i915: vlv: add runtime PM support
>
> I noticed this only by reading the code. To my knowledge it shouldn't
> cause any real problems at the moment, since the power well backing this
> register remains on across a runtime s/r. This may change once
> system-wide s0ix functionality is enabled in the kernel.
>
> v2:
> - resend after a missing git add -u :/
>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
[ http://lists.freedesktop.org/archives/intel-gfx/2015-March/062336.html ]
> ---
> drivers/gpu/drm/i915/i915_drv.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index c3fdbb0..e179da6 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1051,7 +1051,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv)
> s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
>
> s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
> - s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
> + s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT);
>
> s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
> s->ecochk = I915_READ(GAM_ECOCHK);
> @@ -1133,7 +1133,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv)
> I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
>
> I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
> - I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count);
> + I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);
>
> I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
> I915_WRITE(GAM_ECOCHK, s->ecochk);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
2015-04-16 6:45 ` Imre Deak
@ 2015-04-16 9:08 ` Daniel Vetter
2015-04-23 21:27 ` Jani Nikula
0 siblings, 1 reply; 18+ messages in thread
From: Daniel Vetter @ 2015-04-16 9:08 UTC (permalink / raw)
To: Imre Deak; +Cc: intel-gfx, Rodrigo Vivi
On Thu, Apr 16, 2015 at 09:45:01AM +0300, Imre Deak wrote:
> On ke, 2015-04-15 at 16:52 -0700, Rodrigo Vivi wrote:
> > From: Imre Deak <imre.deak@intel.com>
> >
> > Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across
> > suspend/resume, so fix this.
> >
> > This was introduced in
> >
> > commit ddeea5b0c36f3665446518c609be91f9336ef674
> > Author: Imre Deak <imre.deak@intel.com>
> > Date: Mon May 5 15:19:56 2014 +0300
> >
> > drm/i915: vlv: add runtime PM support
> >
> > I noticed this only by reading the code. To my knowledge it shouldn't
> > cause any real problems at the moment, since the power well backing this
> > register remains on across a runtime s/r. This may change once
> > system-wide s0ix functionality is enabled in the kernel.
> >
> > v2:
> > - resend after a missing git add -u :/
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> [ http://lists.freedesktop.org/archives/intel-gfx/2015-March/062336.html ]
Cc: stable@vger.kernel.org I guess plus for Jani.
-Daniel
>
> > ---
> > drivers/gpu/drm/i915/i915_drv.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index c3fdbb0..e179da6 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -1051,7 +1051,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv)
> > s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
> >
> > s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
> > - s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
> > + s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT);
> >
> > s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
> > s->ecochk = I915_READ(GAM_ECOCHK);
> > @@ -1133,7 +1133,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv)
> > I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
> >
> > I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
> > - I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count);
> > + I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);
> >
> > I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
> > I915_WRITE(GAM_ECOCHK, s->ecochk);
>
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg
2015-04-16 9:08 ` Daniel Vetter
@ 2015-04-23 21:27 ` Jani Nikula
0 siblings, 0 replies; 18+ messages in thread
From: Jani Nikula @ 2015-04-23 21:27 UTC (permalink / raw)
To: Daniel Vetter, Imre Deak; +Cc: intel-gfx, Rodrigo Vivi
On Thu, 16 Apr 2015, Daniel Vetter <daniel@ffwll.ch> wrote:
> On Thu, Apr 16, 2015 at 09:45:01AM +0300, Imre Deak wrote:
>> On ke, 2015-04-15 at 16:52 -0700, Rodrigo Vivi wrote:
>> > From: Imre Deak <imre.deak@intel.com>
>> >
>> > Due this typo we don't save/restore the GFX_MAX_REQ_COUNT register across
>> > suspend/resume, so fix this.
>> >
>> > This was introduced in
>> >
>> > commit ddeea5b0c36f3665446518c609be91f9336ef674
>> > Author: Imre Deak <imre.deak@intel.com>
>> > Date: Mon May 5 15:19:56 2014 +0300
>> >
>> > drm/i915: vlv: add runtime PM support
>> >
>> > I noticed this only by reading the code. To my knowledge it shouldn't
>> > cause any real problems at the moment, since the power well backing this
>> > register remains on across a runtime s/r. This may change once
>> > system-wide s0ix functionality is enabled in the kernel.
>> >
>> > v2:
>> > - resend after a missing git add -u :/
>> >
>> > Signed-off-by: Imre Deak <imre.deak@intel.com>
>> > Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
>> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>>
>> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
>> [ http://lists.freedesktop.org/archives/intel-gfx/2015-March/062336.html ]
>
> Cc: stable@vger.kernel.org I guess plus for Jani.
Pushed to drm-intel-next-fixes, thanks for the patch and review.
BR,
Jani.
> -Daniel
>
>>
>> > ---
>> > drivers/gpu/drm/i915/i915_drv.c | 4 ++--
>> > 1 file changed, 2 insertions(+), 2 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> > index c3fdbb0..e179da6 100644
>> > --- a/drivers/gpu/drm/i915/i915_drv.c
>> > +++ b/drivers/gpu/drm/i915/i915_drv.c
>> > @@ -1051,7 +1051,7 @@ static void vlv_save_gunit_s0ix_state(struct drm_i915_private *dev_priv)
>> > s->lra_limits[i] = I915_READ(GEN7_LRA_LIMITS_BASE + i * 4);
>> >
>> > s->media_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
>> > - s->gfx_max_req_count = I915_READ(GEN7_MEDIA_MAX_REQ_COUNT);
>> > + s->gfx_max_req_count = I915_READ(GEN7_GFX_MAX_REQ_COUNT);
>> >
>> > s->render_hwsp = I915_READ(RENDER_HWS_PGA_GEN7);
>> > s->ecochk = I915_READ(GAM_ECOCHK);
>> > @@ -1133,7 +1133,7 @@ static void vlv_restore_gunit_s0ix_state(struct drm_i915_private *dev_priv)
>> > I915_WRITE(GEN7_LRA_LIMITS_BASE + i * 4, s->lra_limits[i]);
>> >
>> > I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->media_max_req_count);
>> > - I915_WRITE(GEN7_MEDIA_MAX_REQ_COUNT, s->gfx_max_req_count);
>> > + I915_WRITE(GEN7_GFX_MAX_REQ_COUNT, s->gfx_max_req_count);
>> >
>> > I915_WRITE(RENDER_HWS_PGA_GEN7, s->render_hwsp);
>> > I915_WRITE(GAM_ECOCHK, s->ecochk);
>>
>>
>
> --
> Daniel Vetter
> Software Engineer, Intel Corporation
> http://blog.ffwll.ch
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 4/9] drm/i915: Remove unused head member in request struct
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
` (2 preceding siblings ...)
2015-04-15 23:52 ` [PATCH 3/9] drm/i915: vlv: fix save/restore of GFX_MAX_REQ_COUNT reg Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-15 23:59 ` Vivi, Rodrigo
2015-04-15 23:52 ` [PATCH 5/9] drm/i915: Remove unneeded check on execlist ringbuf alloc Rodrigo Vivi
` (4 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi, Mika Kuoppala
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
commit 939fd762083f988be271da8c96398178daf9baf0
Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Date: Thu Jan 30 19:04:44 2014 +0200
drm/i915: Get rid of acthd based guilty batch search
Failed to cleanup properly as it made the head obsolete.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 3 ---
drivers/gpu/drm/i915/i915_gem.c | 3 ---
2 files changed, 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 822f259..1a5e976 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2050,9 +2050,6 @@ struct drm_i915_gem_request {
/** GEM sequence number associated with this request. */
uint32_t seqno;
- /** Position in the ringbuffer of the start of the request */
- u32 head;
-
/**
* Position in the ringbuffer of the start of the postfix.
* This is required to calculate the maximum available ringbuffer
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index de6717e..11dfd49 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2323,7 +2323,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
struct drm_i915_private *dev_priv = ring->dev->dev_private;
struct drm_i915_gem_request *request;
struct intel_ringbuffer *ringbuf;
- u32 request_start;
int ret;
request = ring->outstanding_lazy_request;
@@ -2335,7 +2334,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
} else
ringbuf = ring->buffer;
- request_start = intel_ring_get_tail(ringbuf);
/*
* Emit any outstanding flushes - execbuf can fail to emit the flush
* after having emitted the batchbuffer command. Hence we need to fix
@@ -2370,7 +2368,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
return ret;
}
- request->head = request_start;
request->tail = intel_ring_get_tail(ringbuf);
/* Whilst this request exists, batch_obj will be on the
--
2.1.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 4/9] drm/i915: Remove unused head member in request struct
2015-04-15 23:52 ` [PATCH 4/9] drm/i915: Remove unused head member in request struct Rodrigo Vivi
@ 2015-04-15 23:59 ` Vivi, Rodrigo
2015-04-16 7:35 ` Chris Wilson
0 siblings, 1 reply; 18+ messages in thread
From: Vivi, Rodrigo @ 2015-04-15 23:59 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org; +Cc: Kuoppala, Mika
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
On Wed, 2015-04-15 at 16:52 -0700, Rodrigo Vivi wrote:
> From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>
> commit 939fd762083f988be271da8c96398178daf9baf0
> Author: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Date: Thu Jan 30 19:04:44 2014 +0200
>
> drm/i915: Get rid of acthd based guilty batch search
>
> Failed to cleanup properly as it made the head obsolete.
>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 ---
> drivers/gpu/drm/i915/i915_gem.c | 3 ---
> 2 files changed, 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 822f259..1a5e976 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2050,9 +2050,6 @@ struct drm_i915_gem_request {
> /** GEM sequence number associated with this request. */
> uint32_t seqno;
>
> - /** Position in the ringbuffer of the start of the request */
> - u32 head;
> -
> /**
> * Position in the ringbuffer of the start of the postfix.
> * This is required to calculate the maximum available ringbuffer
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index de6717e..11dfd49 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -2323,7 +2323,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
> struct drm_i915_private *dev_priv = ring->dev->dev_private;
> struct drm_i915_gem_request *request;
> struct intel_ringbuffer *ringbuf;
> - u32 request_start;
> int ret;
>
> request = ring->outstanding_lazy_request;
> @@ -2335,7 +2334,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
> } else
> ringbuf = ring->buffer;
>
> - request_start = intel_ring_get_tail(ringbuf);
> /*
> * Emit any outstanding flushes - execbuf can fail to emit the flush
> * after having emitted the batchbuffer command. Hence we need to fix
> @@ -2370,7 +2368,6 @@ int __i915_add_request(struct intel_engine_cs *ring,
> return ret;
> }
>
> - request->head = request_start;
> request->tail = intel_ring_get_tail(ringbuf);
>
> /* Whilst this request exists, batch_obj will be on the
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^ permalink raw reply [flat|nested] 18+ messages in thread* Re: [PATCH 4/9] drm/i915: Remove unused head member in request struct
2015-04-15 23:59 ` Vivi, Rodrigo
@ 2015-04-16 7:35 ` Chris Wilson
0 siblings, 0 replies; 18+ messages in thread
From: Chris Wilson @ 2015-04-16 7:35 UTC (permalink / raw)
To: Vivi, Rodrigo; +Cc: intel-gfx@lists.freedesktop.org, Kuoppala, Mika
On Wed, Apr 15, 2015 at 11:59:13PM +0000, Vivi, Rodrigo wrote:
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Nak. Head isn't unused now.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 5/9] drm/i915: Remove unneeded check on execlist ringbuf alloc
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
` (3 preceding siblings ...)
2015-04-15 23:52 ` [PATCH 4/9] drm/i915: Remove unused head member in request struct Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-16 0:00 ` Vivi, Rodrigo
2015-04-15 23:52 ` [PATCH 6/9] drm/i915: Support for higher DSI clk Rodrigo Vivi
` (3 subsequent siblings)
8 siblings, 1 reply; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi, Mika Kuoppala
From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
We just allocated the intel_ringbuffer with kzalloc. There
is no chance of the ringbuf->obj being other than NULL
so remove the redudant check.
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 29 +++++++++++++----------------
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 4373754..dcfd975 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1879,25 +1879,22 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
ringbuf->last_retired_head = -1;
intel_ring_update_space(ringbuf);
- if (ringbuf->obj == NULL) {
- ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
+ ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
+ if (ret) {
+ DRM_DEBUG_DRIVER(
+ "Failed to allocate ringbuffer obj %s: %d\n",
+ ring->name, ret);
+ goto error_free_rbuf;
+ }
+
+ if (is_global_default_ctx) {
+ ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf);
if (ret) {
- DRM_DEBUG_DRIVER(
- "Failed to allocate ringbuffer obj %s: %d\n",
+ DRM_ERROR(
+ "Failed to pin and map ringbuffer %s: %d\n",
ring->name, ret);
- goto error_free_rbuf;
+ goto error_destroy_rbuf;
}
-
- if (is_global_default_ctx) {
- ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf);
- if (ret) {
- DRM_ERROR(
- "Failed to pin and map ringbuffer %s: %d\n",
- ring->name, ret);
- goto error_destroy_rbuf;
- }
- }
-
}
ret = populate_lr_context(ctx, ctx_obj, ring, ringbuf);
--
2.1.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 5/9] drm/i915: Remove unneeded check on execlist ringbuf alloc
2015-04-15 23:52 ` [PATCH 5/9] drm/i915: Remove unneeded check on execlist ringbuf alloc Rodrigo Vivi
@ 2015-04-16 0:00 ` Vivi, Rodrigo
0 siblings, 0 replies; 18+ messages in thread
From: Vivi, Rodrigo @ 2015-04-16 0:00 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org; +Cc: Kuoppala, Mika
On Wed, 2015-04-15 at 16:52 -0700, Rodrigo Vivi wrote:
> From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>
> We just allocated the intel_ringbuffer with kzalloc. There
> is no chance of the ringbuf->obj being other than NULL
> so remove the redudant check.
>
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 29 +++++++++++++----------------
> 1 file changed, 13 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 4373754..dcfd975 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1879,25 +1879,22 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
> ringbuf->last_retired_head = -1;
> intel_ring_update_space(ringbuf);
>
> - if (ringbuf->obj == NULL) {
I was going to suggest a warn here at least...
> - ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
> + ret = intel_alloc_ringbuffer_obj(dev, ringbuf);
> + if (ret) {
> + DRM_DEBUG_DRIVER(
> + "Failed to allocate ringbuffer obj %s: %d\n",
> + ring->name, ret);
but it will probably end op here so nevermind...
> + goto error_free_rbuf;
> + }
> +
> + if (is_global_default_ctx) {
> + ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf);
> if (ret) {
> - DRM_DEBUG_DRIVER(
> - "Failed to allocate ringbuffer obj %s: %d\n",
> + DRM_ERROR(
> + "Failed to pin and map ringbuffer %s: %d\n",
> ring->name, ret);
> - goto error_free_rbuf;
> + goto error_destroy_rbuf;
> }
> -
> - if (is_global_default_ctx) {
> - ret = intel_pin_and_map_ringbuffer_obj(dev, ringbuf);
> - if (ret) {
> - DRM_ERROR(
> - "Failed to pin and map ringbuffer %s: %d\n",
> - ring->name, ret);
> - goto error_destroy_rbuf;
> - }
> - }
> -
> }
>
> ret = populate_lr_context(ctx, ctx_obj, ring, ringbuf);
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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^ permalink raw reply [flat|nested] 18+ messages in thread
* [PATCH 6/9] drm/i915: Support for higher DSI clk
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
` (4 preceding siblings ...)
2015-04-15 23:52 ` [PATCH 5/9] drm/i915: Remove unneeded check on execlist ringbuf alloc Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 7/9] drm/i915: Changes required to enable DSI Video Mode on CHT Rodrigo Vivi
` (2 subsequent siblings)
8 siblings, 0 replies; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
From: Gaurav K Singh <gaurav.k.singh@intel.com>
For MIPI panels requiring higher DSI clk, values needs to be added
in lfsr_converts table for getting the correct values of pll ctrl
and dividor values which gets programmed in cck regs, otherwise DSI
PLL does not get locked leading to no display on the MIPI panel.
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_dsi_pll.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index 3622d0b..471336d 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -46,8 +46,8 @@ struct dsi_mnp {
static const u32 lfsr_converts[] = {
426, 469, 234, 373, 442, 221, 110, 311, 411, /* 62 - 70 */
461, 486, 243, 377, 188, 350, 175, 343, 427, 213, /* 71 - 80 */
- 106, 53, 282, 397, 354, 227, 113, 56, 284, 142, /* 81 - 90 */
- 71, 35 /* 91 - 92 */
+ 106, 53, 282, 397, 454, 227, 113, 56, 284, 142, /* 81 - 90 */
+ 71, 35, 273, 136, 324, 418, 465, 488, 500, 506 /* 91 - 100 */
};
#ifdef DSI_CLK_FROM_RR
--
2.1.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 7/9] drm/i915: Changes required to enable DSI Video Mode on CHT
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
` (5 preceding siblings ...)
2015-04-15 23:52 ` [PATCH 6/9] drm/i915: Support for higher DSI clk Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 8/9] drm/i915: Remove duplicated intel_fbc_update calls Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 9/9] drm/i915: Attach a PSR property on eDP Rodrigo Vivi
8 siblings, 0 replies; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
From: Gaurav K Singh <gaurav.k.singh@intel.com>
On CHT, changes are required for calculating the correct m,n & p with
minimal error +/- for the required DSI clock, so that the correct dividor
& ctrl values are written in cck regs for DSI. This patch has been tested
on CHT RVP with 1200 x 1920 panel.
Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_dsi_pll.c | 43 +++++++++++++++++++++++++++---------
1 file changed, 33 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dsi_pll.c b/drivers/gpu/drm/i915/intel_dsi_pll.c
index 471336d..5e44c9b 100644
--- a/drivers/gpu/drm/i915/intel_dsi_pll.c
+++ b/drivers/gpu/drm/i915/intel_dsi_pll.c
@@ -162,7 +162,8 @@ static u32 dsi_clk_from_pclk(u32 pclk, int pixel_format, int lane_count)
#endif
-static int dsi_calc_mnp(u32 dsi_clk, struct dsi_mnp *dsi_mnp)
+static int dsi_calc_mnp(struct drm_i915_private *dev_priv,
+ u32 dsi_clk, struct dsi_mnp *dsi_mnp)
{
u32 m, n, p;
u32 ref_clk;
@@ -173,6 +174,10 @@ static int dsi_calc_mnp(u32 dsi_clk, struct dsi_mnp *dsi_mnp)
u32 calc_m;
u32 calc_p;
u32 m_seed;
+ u32 m_start;
+ u32 m_limit;
+ u32 n_limit;
+ u32 p_limit;
/* dsi_clk is expected in KHZ */
if (dsi_clk < 300000 || dsi_clk > 1150000) {
@@ -180,18 +185,33 @@ static int dsi_calc_mnp(u32 dsi_clk, struct dsi_mnp *dsi_mnp)
return -ECHRNG;
}
- ref_clk = 25000;
+ if (IS_CHERRYVIEW(dev_priv->dev)) {
+ ref_clk = 100000;
+ m_start = 70;
+ m_limit = 96;
+ n_limit = 4;
+ p_limit = 6;
+ } else if (IS_VALLEYVIEW(dev_priv->dev)) {
+ ref_clk = 25000;
+ m_start = 62;
+ m_limit = 92;
+ n_limit = 1;
+ p_limit = 6;
+ } else {
+ DRM_ERROR("Unsupported device\n");
+ return -ENODEV;
+ }
target_dsi_clk = dsi_clk;
error = 0xFFFFFFFF;
tmp_error = 0xFFFFFFFF;
calc_m = 0;
calc_p = 0;
- for (m = 62; m <= 92; m++) {
- for (p = 2; p <= 6; p++) {
+ for (m = m_start; m <= m_limit; m++) {
+ for (p = 2; p <= p_limit; p++) {
/* Find the optimal m and p divisors
with minimal error +/- the required clock */
- calc_dsi_clk = (m * ref_clk) / p;
+ calc_dsi_clk = (m * ref_clk) / (p * n_limit);
if (calc_dsi_clk == target_dsi_clk) {
calc_m = m;
calc_p = p;
@@ -212,11 +232,14 @@ static int dsi_calc_mnp(u32 dsi_clk, struct dsi_mnp *dsi_mnp)
}
m_seed = lfsr_converts[calc_m - 62];
- n = 1;
+ n = n_limit;
dsi_mnp->dsi_pll_ctrl = 1 << (DSI_PLL_P1_POST_DIV_SHIFT + calc_p - 2);
- dsi_mnp->dsi_pll_div = (n - 1) << DSI_PLL_N1_DIV_SHIFT |
- m_seed << DSI_PLL_M1_DIV_SHIFT;
-
+ if (IS_CHERRYVIEW(dev_priv->dev))
+ dsi_mnp->dsi_pll_div = (n/2) << DSI_PLL_N1_DIV_SHIFT |
+ m_seed << DSI_PLL_M1_DIV_SHIFT;
+ else
+ dsi_mnp->dsi_pll_div = (n - 1) << DSI_PLL_N1_DIV_SHIFT |
+ m_seed << DSI_PLL_M1_DIV_SHIFT;
return 0;
}
@@ -235,7 +258,7 @@ static void vlv_configure_dsi_pll(struct intel_encoder *encoder)
dsi_clk = dsi_clk_from_pclk(intel_dsi->pclk, intel_dsi->pixel_format,
intel_dsi->lane_count);
- ret = dsi_calc_mnp(dsi_clk, &dsi_mnp);
+ ret = dsi_calc_mnp(dev_priv, dsi_clk, &dsi_mnp);
if (ret) {
DRM_DEBUG_KMS("dsi_calc_mnp failed\n");
return;
--
2.1.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 8/9] drm/i915: Remove duplicated intel_fbc_update calls.
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
` (6 preceding siblings ...)
2015-04-15 23:52 ` [PATCH 7/9] drm/i915: Changes required to enable DSI Video Mode on CHT Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-15 23:52 ` [PATCH 9/9] drm/i915: Attach a PSR property on eDP Rodrigo Vivi
8 siblings, 0 replies; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Paulo Zanoni, Rodrigo Vivi
With frontbuffer tracking taking care of fbc
we were duplicating fbc update call on these cases here.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 12 ------------
drivers/gpu/drm/i915/intel_drv.h | 1 -
2 files changed, 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7bfe2af..1de6fda 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4467,10 +4467,6 @@ static void intel_crtc_enable_planes(struct drm_crtc *crtc)
hsw_enable_ips(intel_crtc);
- mutex_lock(&dev->struct_mutex);
- intel_fbc_update(dev);
- mutex_unlock(&dev->struct_mutex);
-
/*
* FIXME: Once we grow proper nuclear flip support out of this we need
* to compute the mask of flip planes precisely. For the time being
@@ -12620,8 +12616,6 @@ intel_check_primary_plane(struct drm_plane *plane,
intel_crtc->atomic.fb_bits |=
INTEL_FRONTBUFFER_PRIMARY(intel_crtc->pipe);
- intel_crtc->atomic.update_fbc = true;
-
if (intel_wm_need_update(plane, &state->base))
intel_crtc->atomic.update_wm = true;
}
@@ -12741,12 +12735,6 @@ static void intel_finish_crtc_commit(struct drm_crtc *crtc)
intel_frontbuffer_flip(dev, intel_crtc->atomic.fb_bits);
- if (intel_crtc->atomic.update_fbc) {
- mutex_lock(&dev->struct_mutex);
- intel_fbc_update(dev);
- mutex_unlock(&dev->struct_mutex);
- }
-
if (intel_crtc->atomic.post_enable_primary)
intel_post_enable_primary(crtc);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index efa53d5..6e34978 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -434,7 +434,6 @@ struct intel_crtc_atomic_commit {
/* Sleepable operations to perform after commit */
unsigned fb_bits;
bool wait_vblank;
- bool update_fbc;
bool post_enable_primary;
unsigned update_sprite_watermarks;
};
--
2.1.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* [PATCH 9/9] drm/i915: Attach a PSR property on eDP
2015-04-15 23:52 [PATCH 0/9] drm-intel-collector - update Rodrigo Vivi
` (7 preceding siblings ...)
2015-04-15 23:52 ` [PATCH 8/9] drm/i915: Remove duplicated intel_fbc_update calls Rodrigo Vivi
@ 2015-04-15 23:52 ` Rodrigo Vivi
2015-04-16 18:44 ` shuang.he
8 siblings, 1 reply; 18+ messages in thread
From: Rodrigo Vivi @ 2015-04-15 23:52 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
Let userspace know the status of Panel Self-Refresh by virtue of a
property on the appropriate connector.
v2: Only attach the property if the driver is capable of PSR.
v3: Add docbook courtesy of Damien.
v4: Mark the initial value as 'unsupported' - it will be determined
correctly when we later read the DCPD from the panel.
v5: Done by Rodrigo:
- Add disabled state to match all cases
- Attach it anyway to eDP since it is started as unsupported
- Change prop name to PSR
- Add enum to make states more clear
- Rebased on intel_psr.c changing func name and fixing states
v6: Done by Rodrigo:
- Revert name to Panel Self-Refresh
- Only report Enable/Disable since Active/Exit change so rapidily
triggering many uevents as Chris pointed out.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> (v4)
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> (v6)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
Documentation/DocBook/drm.tmpl | 10 ++++++++-
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/intel_dp.c | 1 +
drivers/gpu/drm/i915/intel_drv.h | 1 +
drivers/gpu/drm/i915/intel_psr.c | 47 ++++++++++++++++++++++++++++++++++++++++
5 files changed, 59 insertions(+), 1 deletion(-)
diff --git a/Documentation/DocBook/drm.tmpl b/Documentation/DocBook/drm.tmpl
index f4976cd..bda3948 100644
--- a/Documentation/DocBook/drm.tmpl
+++ b/Documentation/DocBook/drm.tmpl
@@ -2834,7 +2834,7 @@ void intel_crt_init(struct drm_device *dev)
<td valign="top" >TBD</td>
</tr>
<tr>
- <td rowspan="21" valign="top" >i915</td>
+ <td rowspan="22" valign="top" >i915</td>
<td rowspan="2" valign="top" >Generic</td>
<td valign="top" >"Broadcast RGB"</td>
<td valign="top" >ENUM</td>
@@ -2986,6 +2986,14 @@ void intel_crt_init(struct drm_device *dev)
<td valign="top" >TBD</td>
</tr>
<tr>
+ <td valign="top" >eDP</td>
+ <td valign="top" >“Panel Self-Refresh”</td>
+ <td valign="top" >ENUM | IMMUTABLE</td>
+ <td valign="top" >{ "Unsupported", "Idle", "Active" }</td>
+ <td valign="top" >Connector</td>
+ <td valign="top" >Whether the eDP panel supports using self-refresh, which is a power saving mode for static displays as the panel is able to read from its own buffer rather than require the host to send the same frame on every vertical refresh, and whether it is idle or active</td>
+ </tr>
+ <tr>
<td rowspan="2" valign="top" >CDV gma-500</td>
<td rowspan="2" valign="top" >Generic</td>
<td valign="top" >"Broadcast RGB"</td>
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 1a5e976..48e35a8 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -884,6 +884,7 @@ struct i915_psr {
bool link_standby;
bool psr2_support;
bool aux_frame_sync;
+ struct drm_property *property;
};
enum intel_pch {
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1b87969..325805d 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -4788,6 +4788,7 @@ intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connect
intel_dp->color_range_auto = true;
if (is_edp(intel_dp)) {
+ intel_attach_psr_property(connector);
drm_mode_create_scaling_mode_property(connector->dev);
drm_object_attach_property(
&connector->base,
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 6e34978..f6297d4 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1206,6 +1206,7 @@ void intel_backlight_unregister(struct drm_device *dev);
/* intel_psr.c */
+void intel_attach_psr_property(struct drm_connector *connector);
void intel_psr_enable(struct intel_dp *intel_dp);
void intel_psr_disable(struct intel_dp *intel_dp);
void intel_psr_invalidate(struct drm_device *dev,
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 27608ce..fb9ff42 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -56,6 +56,50 @@
#include "intel_drv.h"
#include "i915_drv.h"
+enum psr_state {
+ PSR_UNSUPPORTED = -1,
+ PSR_DISABLED,
+ PSR_ENABLED,
+};
+
+static const struct drm_prop_enum_list psr_names[] = {
+ { PSR_UNSUPPORTED, "Unsupported" },
+ { PSR_DISABLED, "Disabled" },
+ { PSR_ENABLED, "Enabled" },
+};
+
+void intel_attach_psr_property(struct drm_connector *connector)
+{
+ struct drm_device *dev = connector->dev;
+ struct drm_i915_private *dev_priv = dev->dev_private;
+ struct drm_property *prop;
+
+ prop = dev_priv->psr.property;
+ if (prop == NULL) {
+ prop = drm_property_create_enum(dev,
+ DRM_MODE_PROP_ENUM |
+ DRM_MODE_PROP_IMMUTABLE,
+ "Panel Self-Refresh",
+ psr_names,
+ ARRAY_SIZE(psr_names));
+ if (prop == NULL)
+ return;
+
+ dev_priv->psr.property = prop;
+ }
+
+ drm_object_attach_property(&connector->base, prop, PSR_UNSUPPORTED);
+}
+
+static void intel_psr_set_property(struct intel_connector *connector,
+ uint64_t val)
+{
+ struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+
+ drm_object_property_set_value(&connector->base.base,
+ dev_priv->psr.property, val);
+}
+
static bool is_edp_psr(struct intel_dp *intel_dp)
{
return intel_dp->psr_dpcd[0] & DP_PSR_IS_SUPPORTED;
@@ -425,6 +469,7 @@ void intel_psr_enable(struct intel_dp *intel_dp)
}
dev_priv->psr.enabled = intel_dp;
+ intel_psr_set_property(intel_dp->attached_connector, PSR_ENABLED);
unlock:
mutex_unlock(&dev_priv->psr.lock);
}
@@ -501,6 +546,8 @@ void intel_psr_disable(struct intel_dp *intel_dp)
vlv_psr_disable(intel_dp);
dev_priv->psr.enabled = NULL;
+ intel_psr_set_property(intel_dp->attached_connector, PSR_DISABLED);
+
mutex_unlock(&dev_priv->psr.lock);
cancel_delayed_work_sync(&dev_priv->psr.work);
--
2.1.0
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^ permalink raw reply related [flat|nested] 18+ messages in thread* Re: [PATCH 9/9] drm/i915: Attach a PSR property on eDP
2015-04-15 23:52 ` [PATCH 9/9] drm/i915: Attach a PSR property on eDP Rodrigo Vivi
@ 2015-04-16 18:44 ` shuang.he
0 siblings, 0 replies; 18+ messages in thread
From: shuang.he @ 2015-04-16 18:44 UTC (permalink / raw)
To: shuang.he, ethan.gao, intel-gfx, rodrigo.vivi
Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6209
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV 276/276 276/276
ILK 302/302 302/302
SNB 318/318 318/318
IVB 341/341 341/341
BYT -2 287/287 285/287
HSW -1 395/395 394/395
BDW -1 318/318 317/318
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
BYT igt@kms_setmode@clone-exclusive-crtc DMESG_WARN(1)PASS(2) DMESG_WARN(2)
(dmesg patch applied)drm:check_crtc_state[i915]]*ERROR*mismatch_in_has_infoframe(expected#,found#)@mismatch in has_infoframe .* found
WARNING:at_drivers/gpu/drm/i915/intel_display.c:#check_crtc_state[i915]()@WARNING:.* at .* check_crtc_state+0x
BYT igt@kms_setmode@clone-single-crtc DMESG_WARN(1)PASS(2) DMESG_WARN(2)
(dmesg patch applied)drm:check_crtc_state[i915]]*ERROR*mismatch_in_has_infoframe(expected#,found#)@mismatch in has_infoframe .* found
WARNING:at_drivers/gpu/drm/i915/intel_display.c:#check_crtc_state[i915]()@WARNING:.* at .* check_crtc_state+0x
*HSW igt@gem_caching@writes PASS(2) DMESG_WARN(1)PASS(1)
(dmesg patch applied)drm:i915_hangcheck_elapsed[i915]]*ERROR*Hangcheck_timer_elapsed...blitter_ring_idle@Hangcheck timer elapsed... blitter ring idle
*BDW igt@gem_userptr_blits@forked-sync-multifd-mempressure-normal PASS(2) TIMEOUT(1)PASS(1)
Note: You need to pay more attention to line start with '*'
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^ permalink raw reply [flat|nested] 18+ messages in thread