From: Imre Deak <imre.deak@intel.com>
To: Nick Hoath <nicholas.hoath@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/3] drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent
Date: Wed, 29 Apr 2015 16:02:04 +0300 [thread overview]
Message-ID: <1430312524.1811.8.camel@intel.com> (raw)
In-Reply-To: <1428667946-29838-4-git-send-email-nicholas.hoath@intel.com>
On pe, 2015-04-10 at 13:12 +0100, Nick Hoath wrote:
> Signed-off-by: Nick Hoath <nicholas.hoath@intel.com>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index eebee73..cc62e5c 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1054,6 +1054,10 @@ static int bxt_init_workarounds(struct intel_engine_cs *ring)
> GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);
> }
>
> + /* WaForceContextSaveRestoreNonCoherent:bxt */
> + WA_SET_BIT_MASKED(HDC_CHICKEN0,
> + HDC_FORCE_CONTEXT_SAVE_RESTORE_NON_COHERENT);
> +
Looks ok, but again it needs to be added for SKL (all steppings) in
gen9_init_workarounds.
> return 0;
> }
>
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next prev parent reply other threads:[~2015-04-29 13:02 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-04-10 12:12 [PATCH 0/3] drm/i915/bxt: add workarounds Nick Hoath
2015-04-10 12:12 ` [PATCH 1/3] drm/i915/bxt: Add WaDisableThreadStallDopClockGating Nick Hoath
2015-04-29 12:16 ` Imre Deak
2015-05-04 8:32 ` Daniel Vetter
2015-04-10 12:12 ` [PATCH 2/3] drm/i915/bxt: Add WaDisableSbeCacheDispatchPortSharing Nick Hoath
2015-04-29 12:26 ` Imre Deak
2015-05-05 14:24 ` Nick Hoath
2015-05-06 11:51 ` Imre Deak
2015-05-06 14:07 ` Daniel Vetter
2015-04-10 12:12 ` [PATCH 3/3] drm/i915/bxt: Add WaForceContextSaveRestoreNonCoherent Nick Hoath
2015-04-14 11:39 ` shuang.he
2015-04-29 13:02 ` Imre Deak [this message]
2015-05-06 16:01 ` Nick Hoath
2015-05-06 16:32 ` Imre Deak
2015-05-07 6:39 ` Daniel Vetter
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