From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Cc: Ander Conselvan de Oliveira
<ander.conselvan.de.oliveira@intel.com>,
Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH] drm/i915/skl: Handle eDP from generic crtc_compute_clock vfunc
Date: Wed, 13 May 2015 17:40:44 +0100 [thread overview]
Message-ID: <1431535244-8311-1-git-send-email-tvrtko.ursulin@linux.intel.com> (raw)
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Since commit 4978cc93d9ac240b435ce60431aef24239b4c270 started clearing
dpll state and recomputing it via crtc_compute_clock (and probably some
other commit which triggered pipe config checking), modesetting is now
constantly triggering warnings about dpll_hw_state.ctrl1 mismatch.
Reason is crtc_compute_clock calls skl_ddi_pll_select which does not do
anything for eDP, leaving the ctrl1 state at the default of zero.
This potentially hacky fix makes skl_ddi_pll_select call
skl_edp_set_pll_config which fixes the problem for me.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Big CC list so no one misses the chance of saying how this is not the
right fix. :) But that is OK, I was just annoyed by the constant stream
of warnings obscuring real problems.
---
drivers/gpu/drm/i915/intel_ddi.c | 4 +++-
drivers/gpu/drm/i915/intel_dp.c | 2 +-
drivers/gpu/drm/i915/intel_drv.h | 3 +++
3 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 807e15d..e5b7723 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1306,8 +1306,10 @@ skl_ddi_pll_select(struct intel_crtc *intel_crtc,
}
cfgcr1 = cfgcr2 = 0;
- } else /* eDP */
+ } else /* eDP */ {
+ skl_edp_set_pll_config(crtc_state, clock);
return true;
+ }
crtc_state->dpll_hw_state.ctrl1 = ctrl1;
crtc_state->dpll_hw_state.cfgcr1 = cfgcr1;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 75bccd6..13b5b0e 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1092,7 +1092,7 @@ intel_dp_connector_unregister(struct intel_connector *intel_connector)
intel_connector_unregister(intel_connector);
}
-static void
+void
skl_edp_set_pll_config(struct intel_crtc_state *pipe_config, int link_clock)
{
u32 ctrl1;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index aa77af7..6e26644 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1193,6 +1193,9 @@ void intel_edp_drrs_invalidate(struct drm_device *dev,
unsigned frontbuffer_bits);
void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits);
+void
+skl_edp_set_pll_config(struct intel_crtc_state *pipe_config, int link_clock);
+
/* intel_dp_mst.c */
int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
void intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port);
--
2.4.0
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next reply other threads:[~2015-05-13 16:40 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-13 16:40 Tvrtko Ursulin [this message]
2015-05-13 16:56 ` [PATCH] drm/i915/skl: Handle eDP from generic crtc_compute_clock vfunc Damien Lespiau
2015-05-13 17:25 ` Damien Lespiau
2015-05-15 8:46 ` Ander Conselvan De Oliveira
2015-05-15 10:31 ` Ander Conselvan De Oliveira
2015-05-15 10:34 ` [PATCH] drm/i915: Don't overwrite (e)DP PLL selection on SKL Ander Conselvan de Oliveira
2015-05-15 10:56 ` Jani Nikula
2015-05-15 11:02 ` Ander Conselvan De Oliveira
2015-05-15 10:59 ` Tvrtko Ursulin
2015-05-15 11:19 ` Damien Lespiau
2015-05-18 8:04 ` Daniel Vetter
2015-05-18 8:00 ` shuang.he
2015-05-15 14:44 ` [PATCH] drm/i915/skl: Handle eDP from generic crtc_compute_clock vfunc shuang.he
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