Re: [PATCH] drm/i915/vlv: fix RC6 residency time calculation

[Imre Deak <imre.deak@intel.com>]

On ma, 2015-05-18 at 09:13 -0700, Rodrigo Vivi wrote:
> On Mon, May 18, 2015 at 8:46 AM, Imre Deak <imre.deak@intel.com> wrote:
> > The divider value to convert from CZ clock rate to ms needs a +1
> > adjustment on VLV just like on CHV.
> 
> On CHV this was an special case for 320MHz, on VLV we have only one
> freq possible or it is global?
> The spec I have here doesn't show different freqs here on VLV as we have on CHV.

The CZ clock rate on VLV can be any of 200, 266 and 300 MHz. In all
these cases we need to have the +1 adjustment.

> > This matches both the spec and
> 
> Anyway, even on CHV I couldn't find where spec mentions this. Could
> you please point me or share your spec in pvt so I can give  a rv-b
> here.

Ok, sent it to you.

> > the accuracy test by pm_rc6_residency.
> >
> > Testcase: igt/pm_rc6_residency
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_sysfs.c | 2 ++
> >  1 file changed, 2 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> > index 2476268..aa99efc 100644
> > --- a/drivers/gpu/drm/i915/i915_sysfs.c
> > +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> > @@ -76,6 +76,8 @@ static u32 calc_residency(struct drm_device *dev, const u32 reg)
> >                                 /* chv counts are one less */
> >                                 czcount_30ns += 1;
> >                         }
> > +               } else {
> > +                       czcount_30ns += 1;
> >                 }
> >
> >                 if (units == 0)
> > --
> > 2.1.4
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 


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