From: jim.bride@linux.intel.com
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH] drm/i915/hsw: Fix workaround for server AUX channel clock divisor
Date: Tue, 19 May 2015 09:13:30 -0700 [thread overview]
Message-ID: <1432052010-13412-1-git-send-email-jim.bride@linux.intel.com> (raw)
From: Jim Bride <jim.bride@linux.intel.com>
According to the HSW b-spec we need to try clock divisors of 63
and 72, each 3 or more times, when attempting DP AUX channel
communication on a server chipset. This actually wasn't happening
due to a short-circuit that only checked the DP_AUX_CH_CTL_DONE bit
in status rather than checking that the operation was done and
that DP_AUX_CH_CTL_TIME_OUT_ERROR was not set.
Signed-off-by: Jim Bride <jim.bride@linux.intel.com>
---
drivers/gpu/drm/i915/intel_dp.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 0edc305..c01a3f9 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -895,7 +895,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
if (status & DP_AUX_CH_CTL_DONE)
break;
}
- if (status & DP_AUX_CH_CTL_DONE)
+ if ((status & DP_AUX_CH_CTL_DONE) &&
+ !(status & DP_AUX_CH_CTL_TIME_OUT_ERROR))
break;
}
--
1.9.1
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next reply other threads:[~2015-05-19 16:11 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-05-19 16:13 jim.bride [this message]
2015-05-20 23:07 ` [PATCH] drm/i915/hsw: Fix workaround for server AUX channel clock divisor Todd Previte
2015-05-21 8:20 ` Ville Syrjälä
2015-05-21 12:04 ` Jani Nikula
2015-05-21 18:34 ` Jim Bride
2015-05-22 4:43 ` Jani Nikula
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