From mboxrd@z Thu Jan 1 00:00:00 1970 From: jim.bride@linux.intel.com Subject: [PATCH v2] drm/i915/hsw: Fix workaround for server AUX channel clock divisor Date: Wed, 27 May 2015 10:21:48 -0700 Message-ID: <1432747308-345-1-git-send-email-jim.bride@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by gabe.freedesktop.org (Postfix) with ESMTP id 925856E9F8 for ; Wed, 27 May 2015 10:18:13 -0700 (PDT) List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org List-Id: intel-gfx@lists.freedesktop.org RnJvbTogSmltIEJyaWRlIDxqaW0uYnJpZGVAbGludXguaW50ZWwuY29tPgoKQWNjb3JkaW5nIHRv IHRoZSBIU1cgYi1zcGVjIHdlIG5lZWQgdG8gdHJ5IGNsb2NrIGRpdmlzb3JzIG9mIDYzCmFuZCA3 MiwgZWFjaCAzIG9yIG1vcmUgdGltZXMsIHdoZW4gYXR0ZW1wdGluZyBEUCBBVVggY2hhbm5lbApj b21tdW5pY2F0aW9uIG9uIGEgc2VydmVyIGNoaXBzZXQuICBUaGlzIGFjdHVhbGx5IHdhc24ndCBo YXBwZW5pbmcKZHVlIHRvIGEgc2hvcnQtY2lyY3VpdCB0aGF0IG9ubHkgY2hlY2tlZCB0aGUgRFBf QVVYX0NIX0NUTF9ET05FIGJpdAppbiBzdGF0dXMgcmF0aGVyIHRoYW4gY2hlY2tpbmcgdGhhdCB0 aGUgb3BlcmF0aW9uIHdhcyBkb25lIGFuZAp0aGF0IERQX0FVWF9DSF9DVExfVElNRV9PVVRfRVJS T1Igd2FzIG5vdCBzZXQuCgpbdjJdIEltcGxlbWVudGVkIGFsdGVybmF0ZSBzb2x1dGlvbiBzdWdn ZXN0ZWQgYnkgSmFuaSBOaWt1bGEuCgpTaWduZWQtb2ZmLWJ5OiBKaW0gQnJpZGUgPGppbS5icmlk ZUBsaW51eC5pbnRlbC5jb20+Ci0tLQogZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYyB8 IDUgKystLS0KIDEgZmlsZSBjaGFuZ2VkLCAyIGluc2VydGlvbnMoKyksIDMgZGVsZXRpb25zKC0p CgpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYyBiL2RyaXZlcnMv Z3B1L2RybS9pOTE1L2ludGVsX2RwLmMKaW5kZXggMGVkYzMwNS4uN2QxZTAyNCAxMDA2NDQKLS0t IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfZHAuYworKysgYi9kcml2ZXJzL2dwdS9kcm0v aTkxNS9pbnRlbF9kcC5jCkBAIC04OTMsMTAgKzg5Myw4IEBAIGludGVsX2RwX2F1eF9jaChzdHJ1 Y3QgaW50ZWxfZHAgKmludGVsX2RwLAogCQkJCWNvbnRpbnVlOwogCQkJfQogCQkJaWYgKHN0YXR1 cyAmIERQX0FVWF9DSF9DVExfRE9ORSkKLQkJCQlicmVhazsKKwkJCQlnb3RvIGRvbmU7CiAJCX0K LQkJaWYgKHN0YXR1cyAmIERQX0FVWF9DSF9DVExfRE9ORSkKLQkJCWJyZWFrOwogCX0KIAogCWlm ICgoc3RhdHVzICYgRFBfQVVYX0NIX0NUTF9ET05FKSA9PSAwKSB7CkBAIC05MDUsNiArOTAzLDcg QEAgaW50ZWxfZHBfYXV4X2NoKHN0cnVjdCBpbnRlbF9kcCAqaW50ZWxfZHAsCiAJCWdvdG8gb3V0 OwogCX0KIAorZG9uZToKIAkvKiBDaGVjayBmb3IgdGltZW91dCBvciByZWNlaXZlIGVycm9yLgog CSAqIFRpbWVvdXRzIG9jY3VyIHdoZW4gdGhlIHNpbmsgaXMgbm90IGNvbm5lY3RlZAogCSAqLwot LSAKMS45LjEKCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f CkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpo dHRwOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==