From: Arun Siluvery <arun.siluvery@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v4 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround
Date: Tue, 16 Jun 2015 20:25:22 +0100 [thread overview]
Message-ID: <1434482725-21823-4-git-send-email-arun.siluvery@linux.intel.com> (raw)
In-Reply-To: <1434482725-21823-1-git-send-email-arun.siluvery@linux.intel.com>
In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index dcc3f2e..c9875f6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1091,10 +1091,11 @@ static int gen8_init_indirectctx_bb(struct intel_engine_cs *ring,
index = offset;
- /* FIXME: fill one cacheline with NOOPs.
- * Replace these instructions with WA
- */
- while (index < (offset + 16))
+ /* WaDisableCtxRestoreArbitration:bdw,chv */
+ cmd[index++] = MI_ARB_ON_OFF | MI_ARB_DISABLE;
+
+ /* padding */
+ while (((unsigned long) (cmd + index) % CACHELINE_BYTES) != 0)
cmd[index++] = MI_NOOP;
/*
@@ -1126,13 +1127,10 @@ static int gen8_init_perctx_bb(struct intel_engine_cs *ring,
index = offset;
- /* FIXME: fill one cacheline with NOOPs.
- * Replace these instructions with WA
- */
- while (index < (offset + 16))
- cmd[index++] = MI_NOOP;
+ /* WaDisableCtxRestoreArbitration:bdw,chv */
+ cmd[index++] = MI_ARB_ON_OFF | MI_ARB_ENABLE;
- cmd[index - 1] = MI_BATCH_BUFFER_END;
+ cmd[index++] = MI_BATCH_BUFFER_END;
kunmap_atomic(cmd);
--
2.3.0
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next prev parent reply other threads:[~2015-06-16 19:25 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-16 19:25 [PATCH v4 0/6] Add Per-context WA using WA batch buffers Arun Siluvery
2015-06-16 19:25 ` [PATCH v4 1/6] drm/i915/gen8: Add infrastructure to initialize " Arun Siluvery
2015-06-16 20:25 ` Chris Wilson
2015-06-17 18:48 ` Siluvery, Arun
2015-06-17 19:48 ` Siluvery, Arun
2015-06-17 20:21 ` Chris Wilson
2015-06-17 21:36 ` Siluvery, Arun
2015-06-16 20:33 ` Chris Wilson
2015-06-17 9:38 ` Siluvery, Arun
2015-06-16 19:25 ` [PATCH v4 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode Arun Siluvery
2015-06-16 19:25 ` Arun Siluvery [this message]
2015-06-16 19:25 ` [PATCH v4 4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround Arun Siluvery
2015-06-16 20:38 ` Chris Wilson
2015-06-26 16:45 ` Dave Gordon
2015-06-26 16:56 ` Chris Wilson
2015-06-16 19:25 ` [PATCH v4 5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround Arun Siluvery
2015-06-16 20:35 ` Chris Wilson
2015-06-16 19:25 ` [PATCH v4 6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround Arun Siluvery
2015-06-16 20:43 ` Chris Wilson
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