From: Arun Siluvery <arun.siluvery@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v6 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode
Date: Fri, 19 Jun 2015 18:37:11 +0100 [thread overview]
Message-ID: <1434735435-14728-3-git-send-email-arun.siluvery@linux.intel.com> (raw)
In-Reply-To: <1434735435-14728-1-git-send-email-arun.siluvery@linux.intel.com>
Some of the WA applied using WA batch buffers perform writes to scratch page.
In the current flow WA are initialized before scratch obj is allocated.
This patch reorders intel_init_pipe_control() to have a valid scratch obj
before we initialize WA.
v2: Check for valid scratch page before initializing WA as some of them
perform writes to it.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
---
drivers/gpu/drm/i915/intel_lrc.c | 14 +++++++++++---
1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index c9255fc..0d350f6 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1223,6 +1223,12 @@ static int intel_init_workaround_bb(struct intel_engine_cs *ring)
WARN_ON(ring->id != RCS);
+ /* some WA perform writes to scratch page, ensure it is valid */
+ if (ring->scratch.obj == NULL) {
+ DRM_ERROR("scratch page not allocated for %s\n", ring->name);
+ return -EINVAL;
+ }
+
ret = lrc_setup_wa_ctx_obj(ring, PAGE_SIZE);
if (ret) {
DRM_DEBUG_DRIVER("Failed to setup context WA page: %d\n", ret);
@@ -1657,7 +1663,8 @@ static int logical_render_ring_init(struct drm_device *dev)
ring->emit_bb_start = gen8_emit_bb_start;
ring->dev = dev;
- ret = logical_ring_init(dev, ring);
+
+ ret = intel_init_pipe_control(ring);
if (ret)
return ret;
@@ -1672,9 +1679,10 @@ static int logical_render_ring_init(struct drm_device *dev)
ret);
}
- ret = intel_init_pipe_control(ring);
- if (ret)
+ ret = logical_ring_init(dev, ring);
+ if (ret) {
lrc_destroy_wa_ctx_obj(ring);
+ }
return ret;
}
--
2.3.0
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next prev parent reply other threads:[~2015-06-19 17:41 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-19 17:37 [PATCH v6 0/6] Add Per-context WA using WA batch buffers Arun Siluvery
2015-06-19 17:37 ` [PATCH v6 1/6] drm/i915/gen8: Add infrastructure to initialize " Arun Siluvery
2015-06-19 17:50 ` Chris Wilson
2015-06-22 15:36 ` Daniel Vetter
2015-06-22 15:37 ` Siluvery, Arun
2015-06-19 17:37 ` Arun Siluvery [this message]
2015-06-19 17:58 ` [PATCH v6 2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode Chris Wilson
2015-06-19 17:37 ` [PATCH v6 3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround Arun Siluvery
2015-06-19 18:11 ` Chris Wilson
2015-06-19 17:37 ` [PATCH v6 4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround Arun Siluvery
2015-06-19 18:12 ` Chris Wilson
2015-06-22 15:41 ` Daniel Vetter
2015-06-19 17:37 ` [PATCH v6 5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround Arun Siluvery
2015-06-19 18:09 ` Chris Wilson
2015-06-22 11:29 ` Siluvery, Arun
2015-06-22 15:39 ` Daniel Vetter
2015-06-23 14:46 ` [PATCH v6 5/5] " Arun Siluvery
2015-06-23 15:14 ` Chris Wilson
2015-06-23 21:22 ` Daniel Vetter
2015-06-19 17:37 ` [PATCH v6 6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround Arun Siluvery
2015-06-22 11:30 ` Siluvery, Arun
2015-06-22 16:21 ` Ville Syrjälä
2015-06-22 16:59 ` Siluvery, Arun
2015-06-23 14:48 ` Siluvery, Arun
2015-06-19 18:07 ` [PATCH v6 1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers Arun Siluvery
2015-06-22 15:41 ` Daniel Vetter
2015-06-22 15:43 ` Siluvery, Arun
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