Re: [PATCH 4/5] drm/i915/vlv: factor out vlv_calc_port_clock

[Imre Deak <imre.deak@intel.com>]

On ke, 2015-06-24 at 15:46 +0530, Jindal, Sonika wrote:
> 
> On 6/18/2015 7:55 PM, Imre Deak wrote:
> > This functionality will be needed by the next patch adding HW readout
> > support for DDI ports on BXT, so factor it out.
> >
> > No functional change.
> >
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> > ---
> >   drivers/gpu/drm/i915/intel_display.c | 18 ++++++++++--------
> >   drivers/gpu/drm/i915/intel_drv.h     |  2 ++
> >   2 files changed, 12 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> > index 0e5c613..6cf2a15 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -7993,6 +7993,14 @@ static void i9xx_get_pfit_config(struct intel_crtc *crtc,
> >   			I915_READ(LVDS) & LVDS_BORDER_ENABLE;
> >   }
> >
> > +int vlv_calc_port_clock(int refclk, intel_clock_t *pll_clock)
> > +{
> > +	chv_clock(refclk, pll_clock);
> Is vlv_clock function same as chv_clock ?
> I see one clock->n << 22 in chv_clock which is not there in vlv_clock.

No, I botched this up. But Ville noticed it already and I've sent v2
where it should be fixed.

> 
> > +
> > +	/* clock.dot is the fast clock */
> > +	return pll_clock->dot / 5;
> > +}
> > +
> >   static void vlv_crtc_clock_get(struct intel_crtc *crtc,
> >   			       struct intel_crtc_state *pipe_config)
> >   {
> > @@ -8017,10 +8025,7 @@ static void vlv_crtc_clock_get(struct intel_crtc *crtc,
> >   	clock.p1 = (mdiv >> DPIO_P1_SHIFT) & 7;
> >   	clock.p2 = (mdiv >> DPIO_P2_SHIFT) & 0x1f;
> >
> > -	vlv_clock(refclk, &clock);
> > -
> > -	/* clock.dot is the fast clock */
> > -	pipe_config->port_clock = clock.dot / 5;
> > +	pipe_config->port_clock = vlv_calc_port_clock(refclk, &clock);
> >   }
> >
> >   static void
> > @@ -8116,10 +8121,7 @@ static void chv_crtc_clock_get(struct intel_crtc *crtc,
> >   	clock.p1 = (cmn_dw13 >> DPIO_CHV_P1_DIV_SHIFT) & 0x7;
> >   	clock.p2 = (cmn_dw13 >> DPIO_CHV_P2_DIV_SHIFT) & 0x1f;
> >
> > -	chv_clock(refclk, &clock);
> > -
> > -	/* clock.dot is the fast clock */
> > -	pipe_config->port_clock = clock.dot / 5;
> > +	pipe_config->port_clock = vlv_calc_port_clock(refclk, &clock);
> >   }
> >
> >   static bool i9xx_get_pipe_config(struct intel_crtc *crtc,
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index bcafefc..95e14bb 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1139,6 +1139,8 @@ ironlake_check_encoder_dotclock(const struct intel_crtc_state *pipe_config,
> >   				int dotclock);
> >   bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state, int target_clock,
> >   			intel_clock_t *best_clock);
> > +int vlv_calc_port_clock(int refclk, intel_clock_t *pll_clock);
> > +
> >   bool intel_crtc_active(struct drm_crtc *crtc);
> >   void hsw_enable_ips(struct intel_crtc *crtc);
> >   void hsw_disable_ips(struct intel_crtc *crtc);
> >


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