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From: akash.goel@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Akash Goel <akash.goel@intel.com>
Subject: [PATCH 4/6] drm/i915/skl: Updated the i915_ring_freq_table debugfs function
Date: Mon, 29 Jun 2015 14:50:22 +0530	[thread overview]
Message-ID: <1435569624-28693-5-git-send-email-akash.goel@intel.com> (raw)
In-Reply-To: <1435569624-28693-1-git-send-email-akash.goel@intel.com>

From: Akash Goel <akash.goel@intel.com>

Updated the i915_ring_freq_table debugfs function to support the read
of ring frequency table, through Punit interface, for SKL also.

Issue: VIZ-5144
Signed-off-by: Akash Goel <akash.goel@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e40e479..f8df5f2 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1760,6 +1760,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
 	struct drm_i915_private *dev_priv = dev->dev_private;
 	int ret = 0;
 	int gpu_freq, ia_freq;
+	unsigned int max_gpu_freq, min_gpu_freq;
 
 	if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
 		seq_puts(m, "unsupported on this chipset\n");
@@ -1774,17 +1775,27 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
 	if (ret)
 		goto out;
 
+	if (IS_SKYLAKE(dev)) {
+		/* Convert GT frequency to 50 HZ units */
+		min_gpu_freq =
+			dev_priv->rps.min_freq_softlimit / GEN9_FREQ_SCALER;
+		max_gpu_freq =
+			dev_priv->rps.max_freq_softlimit / GEN9_FREQ_SCALER;
+	} else {
+		min_gpu_freq = dev_priv->rps.min_freq_softlimit;
+		max_gpu_freq = dev_priv->rps.max_freq_softlimit;
+	}
+
 	seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
 
-	for (gpu_freq = dev_priv->rps.min_freq_softlimit;
-	     gpu_freq <= dev_priv->rps.max_freq_softlimit;
-	     gpu_freq++) {
+	for (gpu_freq = min_gpu_freq; gpu_freq <= max_gpu_freq; gpu_freq++) {
 		ia_freq = gpu_freq;
 		sandybridge_pcode_read(dev_priv,
 				       GEN6_PCODE_READ_MIN_FREQ_TABLE,
 				       &ia_freq);
 		seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
-			   intel_gpu_freq(dev_priv, gpu_freq),
+			   intel_gpu_freq(dev_priv, (gpu_freq *
+				(IS_SKYLAKE(dev) ? GEN9_FREQ_SCALER : 1))),
 			   ((ia_freq >> 0) & 0xff) * 100,
 			   ((ia_freq >> 8) & 0xff) * 100);
 	}
-- 
1.9.2

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  parent reply	other threads:[~2015-06-29  9:11 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-29  9:20 [PATCH v3 0/6] Ring frequency & Rpe changes for SKL akash.goel
2015-06-29  9:20 ` [PATCH 1/6] drm/i915/skl: Retrieve the Rpe value from Pcode akash.goel
2015-07-09 21:58   ` Rodrigo Vivi
2015-06-29  9:20 ` [PATCH 2/6] drm/i915/skl: Ring frequency table programming changes akash.goel
2015-06-29  9:20 ` [PATCH 3/6] drm/i915/skl: Restrict the ring frequency table programming to SKL akash.goel
2015-07-14  9:36   ` Daniel Vetter
2015-06-29  9:20 ` akash.goel [this message]
2015-07-13  8:39   ` [PATCH 4/6] drm/i915/skl: Updated the i915_ring_freq_table debugfs function Daniel Vetter
2015-06-29  9:20 ` [PATCH 5/6] drm/i915: Add HAS_CORE_RING_FREQ macro akash.goel
2015-06-29  9:20 ` [PATCH 6/6] drm/i915: Added BXT check in " akash.goel
2015-06-29 20:28   ` shuang.he
2015-07-09 22:02     ` Rodrigo Vivi

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