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From: akash.goel@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Akash Goel <akash.goel@intel.com>
Subject: [PATCH 5/6] drm/i915: Add HAS_CORE_RING_FREQ macro
Date: Mon, 29 Jun 2015 14:50:23 +0530	[thread overview]
Message-ID: <1435569624-28693-6-git-send-email-akash.goel@intel.com> (raw)
In-Reply-To: <1435569624-28693-1-git-send-email-akash.goel@intel.com>

From: Akash Goel <akash.goel@intel.com>

Added a new HAS_CORE_RING_FREQ macro, currently used in
gen6_update_ring_freq & i915_ring_freq_table debugfs function.
The programming & read of ring frequency table is needed for newer
GEN(>=6) platforms, except VLV/CHV.

Issue: VIZ-5144
Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Akash Goel <akash.goel@intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
 drivers/gpu/drm/i915/i915_drv.h     | 3 +++
 drivers/gpu/drm/i915/intel_pm.c     | 2 +-
 3 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index f8df5f2..ae36b40 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1762,7 +1762,7 @@ static int i915_ring_freq_table(struct seq_file *m, void *unused)
 	int gpu_freq, ia_freq;
 	unsigned int max_gpu_freq, min_gpu_freq;
 
-	if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
+	if (!HAS_CORE_RING_FREQ(dev)) {
 		seq_puts(m, "unsupported on this chipset\n");
 		return 0;
 	}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ea9caf2..7b6aa71 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2520,6 +2520,9 @@ struct drm_i915_cmd_table {
 
 #define HAS_CSR(dev)	(IS_SKYLAKE(dev))
 
+#define HAS_CORE_RING_FREQ(dev)	(INTEL_INFO(dev)->gen >= 6 && \
+				 !IS_VALLEYVIEW(dev))
+
 #define INTEL_PCH_DEVICE_ID_MASK		0xff00
 #define INTEL_PCH_IBX_DEVICE_ID_TYPE		0x3b00
 #define INTEL_PCH_CPT_DEVICE_ID_TYPE		0x1c00
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index daca7e7..31f178d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4696,7 +4696,7 @@ void gen6_update_ring_freq(struct drm_device *dev)
 {
 	struct drm_i915_private *dev_priv = dev->dev_private;
 
-	if (INTEL_INFO(dev)->gen < 6 || IS_VALLEYVIEW(dev))
+	if (!HAS_CORE_RING_FREQ(dev))
 		return;
 
 	mutex_lock(&dev_priv->rps.hw_lock);
-- 
1.9.2

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  parent reply	other threads:[~2015-06-29  9:11 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-29  9:20 [PATCH v3 0/6] Ring frequency & Rpe changes for SKL akash.goel
2015-06-29  9:20 ` [PATCH 1/6] drm/i915/skl: Retrieve the Rpe value from Pcode akash.goel
2015-07-09 21:58   ` Rodrigo Vivi
2015-06-29  9:20 ` [PATCH 2/6] drm/i915/skl: Ring frequency table programming changes akash.goel
2015-06-29  9:20 ` [PATCH 3/6] drm/i915/skl: Restrict the ring frequency table programming to SKL akash.goel
2015-07-14  9:36   ` Daniel Vetter
2015-06-29  9:20 ` [PATCH 4/6] drm/i915/skl: Updated the i915_ring_freq_table debugfs function akash.goel
2015-07-13  8:39   ` Daniel Vetter
2015-06-29  9:20 ` akash.goel [this message]
2015-06-29  9:20 ` [PATCH 6/6] drm/i915: Added BXT check in HAS_CORE_RING_FREQ macro akash.goel
2015-06-29 20:28   ` shuang.he
2015-07-09 22:02     ` Rodrigo Vivi

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