From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: akash.goel@intel.com
Subject: [PATCH v4 16/18] drm/i915/userptr: Kill user_size limit check
Date: Tue, 7 Jul 2015 16:15:01 +0100 [thread overview]
Message-ID: <1436282103-5854-17-git-send-email-michel.thierry@intel.com> (raw)
In-Reply-To: <1436282103-5854-1-git-send-email-michel.thierry@intel.com>
GTT was only 32b and its max value is 4GB. In order to allow objects
bigger than 4GB in 48b PPGTT, i915_gem_userptr_ioctl we could check
against max 48b range (1ULL << 48).
But since the check no longer applies, just kill the limit.
v2: Use the default ctx to infer the ppgtt max size (Akash).
v3: Just kill the limit, it was only there for early detection of an
error when used for execbuffer (Chris).
Cc: Akash Goel <akash.goel@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
drivers/gpu/drm/i915/i915_gem_userptr.c | 4 ----
1 file changed, 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_userptr.c b/drivers/gpu/drm/i915/i915_gem_userptr.c
index 1f4e5a3..1b66e39 100644
--- a/drivers/gpu/drm/i915/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/i915_gem_userptr.c
@@ -788,7 +788,6 @@ static const struct drm_i915_gem_object_ops i915_gem_userptr_ops = {
int
i915_gem_userptr_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
{
- struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_i915_gem_userptr *args = data;
struct drm_i915_gem_object *obj;
int ret;
@@ -801,9 +800,6 @@ i915_gem_userptr_ioctl(struct drm_device *dev, void *data, struct drm_file *file
if (offset_in_page(args->user_ptr | args->user_size))
return -EINVAL;
- if (args->user_size > dev_priv->gtt.base.total)
- return -E2BIG;
-
if (!access_ok(args->flags & I915_USERPTR_READ_ONLY ? VERIFY_READ : VERIFY_WRITE,
(char __user *)(unsigned long)args->user_ptr, args->user_size))
return -EFAULT;
--
2.4.5
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2015-07-07 15:15 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-07 15:14 [PATCH v4 00/18] 48-bit PPGTT Michel Thierry
2015-07-07 15:14 ` [PATCH v4 01/18] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-07-07 15:14 ` [PATCH v4 02/18] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-07-07 15:14 ` [PATCH v4 03/18] drm/i915/gen8: Add PML4 structure Michel Thierry
2015-07-11 20:02 ` Chris Wilson
2015-07-13 14:41 ` Michel Thierry
2015-07-13 20:02 ` Chris Wilson
2015-07-07 15:14 ` [PATCH v4 04/18] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-07-07 15:14 ` [PATCH v4 05/18] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-07-07 15:14 ` [PATCH v4 06/18] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-07-07 15:14 ` [PATCH v4 07/18] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-07-07 15:14 ` [PATCH v4 08/18] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-07-07 15:14 ` [PATCH v4 09/18] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-07-07 15:14 ` [PATCH v4 10/18] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-07-07 15:14 ` [PATCH v4 11/18] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-07-07 15:14 ` [PATCH v4 12/18] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-07-11 20:10 ` Chris Wilson
2015-07-07 15:14 ` [PATCH v4 13/18] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-07-07 15:14 ` [PATCH v4 14/18] drm/i915: object size needs to be u64 Michel Thierry
2015-07-07 15:27 ` Chris Wilson
2015-07-07 15:44 ` Michel Thierry
2015-07-07 20:08 ` Chris Wilson
2015-07-08 11:22 ` Michel Thierry
2015-07-08 15:22 ` Daniel Vetter
2015-07-08 16:42 ` Michel Thierry
2015-07-08 17:03 ` Chris Wilson
2015-07-13 10:27 ` Michel Thierry
2015-07-07 15:15 ` [PATCH v4 15/18] drm/i915: batch_obj vm offset must " Michel Thierry
2015-07-07 15:15 ` Michel Thierry [this message]
2015-07-07 15:15 ` [PATCH v4 17/18] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-07-09 16:19 ` Michel Thierry
2015-07-10 9:39 ` Chris Wilson
2015-07-11 18:51 ` Chris Wilson
2015-07-07 15:15 ` [PATCH v4 18/18] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-07-11 3:56 ` shuang.he
2015-07-10 9:39 ` [PATCH v4 00/18] 48-bit PPGTT Chris Wilson
2015-07-10 10:24 ` Michel Thierry
2015-07-11 19:52 ` Chris Wilson
2015-07-11 20:06 ` Chris Wilson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1436282103-5854-17-git-send-email-michel.thierry@intel.com \
--to=michel.thierry@intel.com \
--cc=akash.goel@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox