From: Michel Thierry <michel.thierry@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: akash.goel@intel.com
Subject: [PATCH v5 11/19] drm/i915/gen8: Initialize PDPs
Date: Thu, 16 Jul 2015 10:33:23 +0100 [thread overview]
Message-ID: <1437039211-2507-12-git-send-email-michel.thierry@intel.com> (raw)
In-Reply-To: <1437039211-2507-1-git-send-email-michel.thierry@intel.com>
Similar to PDs, while setting up a page directory pointer, make all entries
of the pdp point to the scratch pd before mapping (and make all its entries
point to the scratch page); this is to be safe in case of out of bound
access or proactive prefetch.
v2: Handle scratch_pdp allocation failure correctly, and keep
initialize_px functions together (Akash)
v3: Rebase after Mika's ppgtt cleanup / scratch merge patch series. Rely on
the added macros to initialize the pdps.
v4: Rebase after final merged version of Mika's ppgtt/scratch patches
(and removed commit message part related to v3).
Suggested-by: Akash Goel <akash.goel@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 38 +++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c3ab9a5..ca121eb 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -602,6 +602,27 @@ static void free_pdp(struct drm_device *dev,
}
}
+static void gen8_initialize_pdp(struct i915_address_space *vm,
+ struct i915_page_directory_pointer *pdp)
+{
+ gen8_ppgtt_pdpe_t scratch_pdpe;
+
+ scratch_pdpe = gen8_pdpe_encode(px_dma(vm->scratch_pd), I915_CACHE_LLC);
+
+ fill_px(vm->dev, pdp, scratch_pdpe);
+}
+
+static void gen8_initialize_pml4(struct i915_address_space *vm,
+ struct i915_pml4 *pml4)
+{
+ gen8_ppgtt_pml4e_t scratch_pml4e;
+
+ scratch_pml4e = gen8_pml4e_encode(px_dma(vm->scratch_pdp),
+ I915_CACHE_LLC);
+
+ fill_px(vm->dev, pml4, scratch_pml4e);
+}
+
static void
gen8_setup_page_directory(struct i915_hw_ppgtt *ppgtt,
struct i915_page_directory_pointer *pdp,
@@ -863,8 +884,20 @@ static int gen8_init_scratch(struct i915_address_space *vm)
return PTR_ERR(vm->scratch_pd);
}
+ if (USES_FULL_48BIT_PPGTT(dev)) {
+ vm->scratch_pdp = alloc_pdp(dev);
+ if (IS_ERR(vm->scratch_pdp)) {
+ free_pd(dev, vm->scratch_pd);
+ free_pt(dev, vm->scratch_pt);
+ free_scratch_page(dev, vm->scratch_page);
+ return PTR_ERR(vm->scratch_pdp);
+ }
+ }
+
gen8_initialize_pt(vm, vm->scratch_pt);
gen8_initialize_pd(vm, vm->scratch_pd);
+ if (USES_FULL_48BIT_PPGTT(dev))
+ gen8_initialize_pdp(vm, vm->scratch_pdp);
return 0;
}
@@ -873,6 +906,8 @@ static void gen8_free_scratch(struct i915_address_space *vm)
{
struct drm_device *dev = vm->dev;
+ if (USES_FULL_48BIT_PPGTT(dev))
+ free_pdp(dev, vm->scratch_pdp);
free_pd(dev, vm->scratch_pd);
free_pt(dev, vm->scratch_pt);
free_scratch_page(dev, vm->scratch_page);
@@ -1236,6 +1271,7 @@ static int gen8_alloc_va_range_4lvl(struct i915_address_space *vm,
if (IS_ERR(pdp))
goto err_out;
+ gen8_initialize_pdp(vm, pdp);
pml4->pdps[pml4e] = pdp;
__set_bit(pml4e, new_pdps);
trace_i915_page_directory_pointer_entry_alloc(vm,
@@ -1314,6 +1350,8 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
if (ret)
goto free_scratch;
+ gen8_initialize_pml4(&ppgtt->base, &ppgtt->pml4);
+
ppgtt->base.total = 1ULL << 48;
ppgtt->switch_mm = gen8_48b_mm_switch;
} else {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 11d44b3..70c50e7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -278,6 +278,7 @@ struct i915_address_space {
struct i915_page_scratch *scratch_page;
struct i915_page_table *scratch_pt;
struct i915_page_directory *scratch_pd;
+ struct i915_page_directory_pointer *scratch_pdp; /* GEN8+ & 48b PPGTT */
/**
* List of objects currently involved in rendering.
--
2.4.5
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next prev parent reply other threads:[~2015-07-16 9:33 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-07-16 9:33 [PATCH v5 00/19] 48-bit PPGTT Michel Thierry
2015-07-16 9:33 ` [PATCH v5 01/19] drm/i915: Remove unnecessary gen8_clamp_pd Michel Thierry
2015-07-16 9:33 ` [PATCH v5 02/19] drm/i915/gen8: Make pdp allocation more dynamic Michel Thierry
2015-07-16 9:33 ` [PATCH v5 03/19] drm/i915/gen8: Abstract PDP usage Michel Thierry
2015-07-16 9:33 ` [PATCH v5 04/19] drm/i915/gen8: Add dynamic page trace events Michel Thierry
2015-07-16 9:33 ` [PATCH v5 05/19] drm/i915/gen8: Add PML4 structure Michel Thierry
2015-07-16 9:33 ` [PATCH v5 06/19] drm/i915/gen8: implement alloc/free for 4lvl Michel Thierry
2015-07-29 14:34 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 07/19] drm/i915/gen8: Add 4 level switching infrastructure and lrc support Michel Thierry
2015-07-29 14:34 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 08/19] drm/i915/gen8: Generalize PTE writing for GEN8 PPGTT Michel Thierry
2015-07-29 14:35 ` Michel Thierry
2015-07-16 9:33 ` [PATCH v5 09/19] drm/i915/gen8: Pass sg_iter through pte inserts Michel Thierry
2015-07-16 9:33 ` [PATCH v5 10/19] drm/i915/gen8: Add 4 level support in insert_entries and clear_range Michel Thierry
2015-07-16 9:33 ` Michel Thierry [this message]
2015-07-29 14:35 ` [PATCH v5 11/19] drm/i915/gen8: Initialize PDPs Michel Thierry
2015-07-16 9:33 ` [PATCH v5 12/19] drm/i915: Expand error state's address width to 64b Michel Thierry
2015-07-16 9:33 ` [PATCH v5 13/19] drm/i915/gen8: Add ppgtt info and debug_dump Michel Thierry
2015-07-16 9:33 ` [PATCH v5 14/19] drm/i915: object size needs to be u64 Michel Thierry
2015-07-16 9:33 ` [PATCH v5 15/19] drm/i915: batch_obj vm offset must " Michel Thierry
2015-07-16 9:33 ` [PATCH v5 16/19] drm/i915/userptr: Kill user_size limit check Michel Thierry
2015-07-16 9:33 ` [PATCH v5 17/19] drm/i915: Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset Michel Thierry
2015-07-27 14:34 ` Goel, Akash
2015-07-27 14:46 ` Chris Wilson
2015-07-27 14:53 ` Michel Thierry
2015-07-27 21:11 ` Chris Wilson
2015-07-28 11:12 ` Michel Thierry
2015-07-28 14:43 ` Chris Wilson
2015-07-29 11:05 ` Michel Thierry
2015-07-29 11:17 ` Chris Wilson
2015-07-16 9:33 ` [PATCH v5 18/19] drm/i915/gen8: Flip the 48b switch Michel Thierry
2015-07-16 9:33 ` [PATCH v5 19/19] drm/i915: Save some page table setup on repeated binds Michel Thierry
2015-07-28 12:18 ` [PATCH v5 00/19] 48-bit PPGTT Chris Wilson
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