[PATCH v2 0/2] drm/i915/bxt: work around HW coherency issue

From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Jani Nikula <jani.nikula@intel.com>,
	Mika Kuoppala <mika.kuoppala@intel.com>
Subject: [PATCH v2 0/2] drm/i915/bxt: work around HW coherency issue
Date: Fri, 14 Aug 2015 15:38:55 +0300	[thread overview]
Message-ID: <1439555937-8016-1-git-send-email-imre.deak@intel.com> (raw)

This is a v2 of [1]. Since v1 the HW team confirmed that there is an
HW issue in A steppings with the GPU/CPU snoop logic, which explains why
we need this workaround.

In v2 I fixed a typo and limited the workaround to A steppings, since
in later steppings this problem is fixed.

[1]
http://lists.freedesktop.org/archives/intel-gfx/2015-June/068218.html

Imre Deak (2):
  drm/i915/bxt: work around HW coherency issue when accessing GPU seqno
  drm/i915/bxt: work around HW coherency issue for cached GEM mappings

 drivers/gpu/drm/i915/i915_gem.c         | 11 ++++++++++-
 drivers/gpu/drm/i915/intel_lrc.c        | 20 ++++++++++++++++++++
 drivers/gpu/drm/i915/intel_ringbuffer.h |  7 +++++++
 3 files changed, 37 insertions(+), 1 deletion(-)

-- 
2.1.4

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