Re: [PATCH 5/7] drm/i915: Delay first PSR activation.

["Zanoni, Paulo R" <paulo.r.zanoni@intel.com>]

Em Qui, 2015-08-20 às 17:55 -0700, Rodrigo Vivi escreveu:
> This affects PSR on VLV, CHV, HSW and BDW.
> 
> When debuging the frozen screen caused by HW tracking with low
> power state I noticed that if we keep moving the mouse non stop
> you will miss the screen updates for a while. At least
> until we stop moving the mouse for a small time and move again.
> 
> The actual enabling should happen immediately after
> Display Port enabling sequence finished with links trained and
> everything enabled. However we face many issues when enabling PSR
> right after a modeset.
> 
> On VLV/CHV we face blank screens on this scenario and on HSW+
> we face a recoverable frozen screen, at least until next
> exit-activate sequence.
> 
> Another workaround for the same issue here would be to increase
> re-enable idle time from 100 to 500 as we did for VLV/CHV.
> However this patch workaround this issue in a better
> way since it doesn't reduce PSR residency and also
> allow us to reduce the delay time between re-enables at least
> on VLV/CHV.

It sounds like this could use a little more debugging. Have we tried
moving the psr enable to after intel_post_plane_update()?

The "move the cursor to reproduce bug" sounds very weird.

> 
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_psr.c | 18 ++++++++++++++++--
>  1 file changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_psr.c 
> b/drivers/gpu/drm/i915/intel_psr.c
> index d02d4e2..2be4a62 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -427,6 +427,19 @@ void intel_psr_enable(struct intel_dp *intel_dp)
>  		vlv_psr_enable_source(intel_dp);
>  	}
>  
> +	/*
> +	 * FIXME: Activation should happen immediately since this 
> function
> +	 * is just called after pipe is fully trained and enabled.
> +	 * However on previous platforms we face issues when first 
> activation
> +	 * follows a modeset so quickly.
> +	 *     - On VLV/CHV we get bank screen on first activation
> +	 *     - On HSW/BDW we get a recoverable frozen screen until 
> next
> +	 *       exit-activate sequence.
> +	 */
> +	if (INTEL_INFO(dev)->gen < 9)
> +		schedule_delayed_work(&dev_priv->psr.work,
> +				      msecs_to_jiffies(500));
> +
>  	dev_priv->psr.enabled = intel_dp;
>  unlock:
>  	mutex_unlock(&dev_priv->psr.lock);
> @@ -729,8 +742,9 @@ void intel_psr_flush(struct drm_device *dev,
>  		intel_psr_exit(dev);
>  
>  	if (!dev_priv->psr.active && !dev_priv
> ->psr.busy_frontbuffer_bits)
> -		schedule_delayed_work(&dev_priv->psr.work,
> -				      msecs_to_jiffies(delay_ms));
> +		if (!work_busy(&dev_priv->psr.work.work))
> +			schedule_delayed_work(&dev_priv->psr.work,
> +					     
>  msecs_to_jiffies(delay_ms));
>  	mutex_unlock(&dev_priv->psr.lock);
>  }
>  
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