Re: [PATCH] drm/i915: Use dpcd read wake for sink crc calls.

Vivi, Rodrigo
2015-10-21T19:59:43Z

On Thu, 2015-10-22 at 00:01 +0530, Thulasimani, Sivakumar wrote:
>
> On 8/25/2015 2:50 AM, Vivi, Rodrigo wrote:
> > On Mon, 2015-08-24 at 19:54 +0000, Zanoni, Paulo R wrote:
> > > Em Qui, 2015-08-20 às 16:23 -0700, Rodrigo Vivi escreveu:
> > > > Let's use a native read with retry as suggested per spec to
> > > > fix Sink CRC on SKL when PSR is enabled.
> > > >
> > > > With PSR enabled panel is probably taking more time to wake
> > > > and dpcd read is faling.
> > > Does this commit actually fix any known problem with Sink CRC? Or
> > > is
> > > it
> > > just a try? It would be nice to have this clarified in the commit
> > > message.
> > It was just a try but that made sink crc working on my SKL when PSR
> > is
> > enabled. nothing much to add...
> SKL has new register AUX_MUTEX which should be used when accessing
> dpcd
> on edp. just searched the nightly code and could not find it. it
> might
> be the reason
> for random dpcd failures reported in the other thread.

Oh, this is interesting... I didn't know that.
That would explain that forbidden value on patch 3/4...

>
> regards,
> Sivakumar
> > > Anyway, it looks correct, so:
> > > Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> > >
> > > > v2: Fix my email domain on commit message. Thanks Rafael.
> > > >
> > > > Cc: Rafael Antognolli <rafael.antognolli@intel.com>
> > > > Cc: Sonika Jindal <sonika.jindal@intel.com>
> > > > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > > ---
> > > > drivers/gpu/drm/i915/intel_dp.c | 15 +++++++++------
> > > > 1 file changed, 9 insertions(+), 6 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > > > b/drivers/gpu/drm/i915/intel_dp.c
> > > > index d32ce48..34f5e33 100644
> > > > --- a/drivers/gpu/drm/i915/intel_dp.c
> > > > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > > > @@ -4037,7 +4037,8 @@ static int intel_dp_sink_crc_stop(struct
> > > > intel_dp *intel_dp)
> > > > u8 buf;
> > > > int ret = 0;
> > > >
> > > > - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK,
> > > > &buf)
> > > > <
> > > > 0) {
> > > > + if (intel_dp_dpcd_read_wake(&intel_dp->aux,
> > > > DP_TEST_SINK,
> > > > + &buf, 1) < 0) {
> > > > DRM_DEBUG_KMS("Sink CRC couldn't be stopped
> > > > properly\n");
> > > > ret = -EIO;
> > > > goto out;
> > > > @@ -4069,7 +4070,8 @@ static int intel_dp_sink_crc_start(struct
> > > > intel_dp *intel_dp)
> > > > return ret;
> > > > }
> > > >
> > > > - if (drm_dp_dpcd_readb(&intel_dp->aux,
> > > > DP_TEST_SINK_MISC,
> > > > &buf) < 0)
> > > > + if (intel_dp_dpcd_read_wake(&intel_dp->aux,
> > > > DP_TEST_SINK_MISC,
> > > > + &buf, 1) < 0)
> > > > return -EIO;
> > > >
> > > > if (!(buf & DP_TEST_CRC_SUPPORTED))
> > > > @@ -4077,7 +4079,7 @@ static int intel_dp_sink_crc_start(struct
> > > > intel_dp *intel_dp)
> > > >
> > > > intel_dp->sink_crc.last_count = buf &
> > > > DP_TEST_COUNT_MASK;
> > > >
> > > > - if (drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_SINK,
> > > > &buf)
> > > > <
> > > > 0)
> > > > + if (intel_dp_dpcd_read_wake(&intel_dp->aux,
> > > > DP_TEST_SINK,
> > > > &buf, 1) < 0)
> > > > return -EIO;
> > > >
> > > > hsw_disable_ips(intel_crtc);
> > > > @@ -4109,8 +4111,8 @@ int intel_dp_sink_crc(struct intel_dp
> > > > *intel_dp, u8 *crc)
> > > > do {
> > > > intel_wait_for_vblank(dev, intel_crtc->pipe);
> > > >
> > > > - if (drm_dp_dpcd_readb(&intel_dp->aux,
> > > > - DP_TEST_SINK_MISC, &buf)
> > > > <
> > > > 0)
> > > > {
> > > > + if (intel_dp_dpcd_read_wake(&intel_dp->aux,
> > > > + DP_TEST_SINK_MISC,
> > > > &buf,
> > > > 1) < 0) {
> > > > ret = -EIO;
> > > > goto stop;
> > > > }
> > > > @@ -4123,7 +4125,8 @@ int intel_dp_sink_crc(struct intel_dp
> > > > *intel_dp, u8 *crc)
> > > > if (count == 0)
> > > > intel_dp->sink_crc.last_count = 0;
> > > >
> > > > - if (drm_dp_dpcd_read(&intel_dp->aux,
> > > > DP_TEST_CRC_R_CR, crc, 6) < 0) {
> > > > + if (intel_dp_dpcd_read_wake(&intel_dp->aux,
> > > > DP_TEST_CRC_R_CR,
> > > > + crc, 6) < 0) {
> > > > ret = -EIO;
> > > > goto stop;
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