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From: Sagar Arun Kamble <sagar.a.kamble@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 1/7] drm/i915: Add IS_SKL_GT3 and IS_SKL_GT4 macro.
Date: Sat, 12 Sep 2015 10:17:50 +0530	[thread overview]
Message-ID: <1442033276-2191-2-git-send-email-sagar.a.kamble@intel.com> (raw)
In-Reply-To: <1442033276-2191-1-git-send-email-sagar.a.kamble@intel.com>

It will be usefull to specify w/a that affects only SKL GT3 and GT4.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index b5db246..1e48c86 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2491,6 +2491,11 @@ struct drm_i915_cmd_table {
 #define IS_SKL_ULX(dev)		(INTEL_DEVID(dev) == 0x190E || \
 				 INTEL_DEVID(dev) == 0x1915 || \
 				 INTEL_DEVID(dev) == 0x191E)
+#define IS_SKL_GT3(dev)		(IS_SKYLAKE(dev) && \
+				 (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
+#define IS_SKL_GT4(dev)		(IS_SKYLAKE(dev) && \
+				 (INTEL_DEVID(dev) & 0x00F0) == 0x0030)
+
 #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary)
 
 #define SKL_REVID_A0		(0x0)
-- 
1.9.1

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  reply	other threads:[~2015-09-12  4:46 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-12  4:47 [PATCH v2 0/7] Gen9 RC6, Turbo, Coarse Power Gating Fixes Sagar Arun Kamble
2015-09-12  4:47 ` Sagar Arun Kamble [this message]
2015-09-21 18:49   ` [PATCH v2 1/7] drm/i915: Add IS_SKL_GT3 and IS_SKL_GT4 macro Yu Dai
2015-09-12  4:47 ` [PATCH v2 2/7] drm/i915: WaRsDisableCoarsePowerGating Sagar Arun Kamble
2015-09-21 18:49   ` Yu Dai
2015-09-23  8:49   ` Daniel Vetter
2015-09-12  4:47 ` [PATCH v2 3/7] drm/i915: WaRsUseTimeoutMode Sagar Arun Kamble
2015-09-21 18:49   ` Yu Dai
2015-09-21 21:47     ` O'Rourke, Tom
2015-09-23  8:50   ` Daniel Vetter
2015-09-23  9:33     ` Kamble, Sagar A
2015-09-23  9:36     ` [PATCH 1/1] drm/i915: Update Promotion timer for RC6 TO Mode Sagar Arun Kamble
2015-09-24 21:11       ` O'Rourke, Tom
2015-09-30 10:43         ` [PATCH v2 " Sagar Arun Kamble
2015-09-30 16:38           ` O'Rourke, Tom
2015-10-01  8:21           ` Daniel Vetter
2015-09-12  4:47 ` [PATCH v2 4/7] drm/i915: WaRsDoubleRc6WrlWithCoarsePowerGating Sagar Arun Kamble
2015-09-21 18:50   ` Yu Dai
2015-09-23  8:51   ` Daniel Vetter
2015-09-12  4:47 ` [PATCH v2 5/7] drm/i915: Program GuC MAX IDLE Count Sagar Arun Kamble
2015-09-21 18:50   ` Yu Dai
2015-09-12  4:47 ` [PATCH v2 6/7] drm/i915/guc: Notify coarse power gating configuration to GuC properly Sagar Arun Kamble
2015-09-21 16:51   ` Yu Dai
2015-09-22 22:51     ` Yu Dai
2015-09-21 18:59   ` Yu Dai
2015-09-12  4:47 ` [PATCH v2 7/7] drm/i915/bxt: WaGsvDisableTurbo Sagar Arun Kamble
2015-09-21 11:24   ` [PATCH v3 1/1] " Sagar Arun Kamble
2015-09-21 18:50   ` [PATCH v2 7/7] " Yu Dai
2015-09-23  6:32     ` Kamble, Sagar A
2015-09-23  8:53     ` Daniel Vetter

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