Re: [PATCH 07/12] drm/i915/bxt: Update stepping check for WaDisableSDEUnitClockGating

From: Imre Deak <imre.deak@intel.com>
To: Arun Siluvery <arun.siluvery@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org, Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH 07/12] drm/i915/bxt: Update stepping check for WaDisableSDEUnitClockGating
Date: Mon, 28 Sep 2015 14:06:29 +0300	[thread overview]
Message-ID: <1443438389.15040.1.camel@intel.com> (raw)
In-Reply-To: <1443188026-1222-8-git-send-email-arun.siluvery@linux.intel.com>

On pe, 2015-09-25 at 14:33 +0100, Arun Siluvery wrote:
> It is also applicable for B0.
> 
> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9151a2b..be39f7ad 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -121,8 +121,10 @@ static void bxt_init_clock_gating(struct drm_device *dev)
>  	gen9_init_clock_gating(dev);
>  
>  	/* WaDisableSDEUnitClockGating:bxt */
> -	I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> -		   GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
> +	if (INTEL_REVID(dev) >= BXT_REVID_A0) {

This check looks redundant.

> +		I915_WRITE(GEN8_UCGCTL6, (I915_READ(GEN8_UCGCTL6) |
> +					  GEN8_SDEUNIT_CLOCK_GATE_DISABLE));
> +	}
>  
>  	/* WaSetHDCunitClckGatingDisable:bxt */
>  	/* WaSetHdcUnitClockGatingDisableInUcgctl6:bxt */

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