From: David Woodhouse <dwmw2@infradead.org>
To: Daniel Vetter <daniel@ffwll.ch>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 6/9] drm/i915: driver based PASID handling
Date: Fri, 09 Oct 2015 10:07:21 +0100 [thread overview]
Message-ID: <1444381641.92154.65.camel@infradead.org> (raw)
In-Reply-To: <20151009084747.GN26718@phenom.ffwll.local>
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On Fri, 2015-10-09 at 10:47 +0200, Daniel Vetter wrote:
> On Fri, Oct 09, 2015 at 08:56:24AM +0100, David Woodhouse wrote:
> > On Fri, 2015-10-09 at 09:28 +0200, Daniel Vetter wrote:
> > >
> > > Hm if this still works the same way as on older platforms then pagefaults
> > > just read all 0 and writes go nowhere from the gpu. That generally also
> > > explains ever-increasing numbers of the CS execution pointer since it's
> > > busy churning through 48b worth of address space filled with MI_NOP. I'd
> > > have hoped our hw would do better than that with svm ...
> >
> > I'm looking at simple cases like Jesse's 'gem_svm_fault' test. If the
> > access to process address space (a single dword write) does nothing,
> > I'm not sure why it would then churn through MI_NOOPs; why would the
> > batch still not complete?
>
> Yeah that testcase doesn't fit, the one I had in mind is where the batch
> itself faults and the CS just reads MI_NOP forever. No idea why the gpu
> just keeps walking through the address space here. Puzzling.
Does it just keep walking through the address space?
When I hacked my page request handler to *not* service the fault and
just say it failed, the batch did seem to complete as normal. Just
without doing the write, as you described.
--
David Woodhouse Open Source Technology Centre
David.Woodhouse@intel.com Intel Corporation
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next prev parent reply other threads:[~2015-10-09 9:07 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-04 16:58 [RFC] Page table sharing and bufferless execbuf Jesse Barnes
2015-09-04 16:58 ` [PATCH 1/9] mm: move mmu_find_ops to mmu_notifier.c Jesse Barnes
2015-09-04 16:58 ` [PATCH 2/9] signal: export force_sig_info Jesse Barnes
2015-09-04 16:58 ` [PATCH 3/9] android/sync: add sync_fence_create_dma Jesse Barnes
2015-09-04 16:58 ` [PATCH 4/9] android/sync: hack: enable fence signaling in Android Native Sync implementation Jesse Barnes
2015-09-04 16:58 ` [PATCH 5/9] drm/i915: add create_context2 ioctl Jesse Barnes
2015-09-04 16:59 ` [PATCH 6/9] drm/i915: driver based PASID handling Jesse Barnes
2015-10-07 13:00 ` David Woodhouse
2015-10-07 15:16 ` Jesse Barnes
2015-10-07 16:14 ` Daniel Vetter
2015-10-07 16:28 ` Jesse Barnes
2015-10-07 17:17 ` David Woodhouse
2015-10-07 17:26 ` Jesse Barnes
2015-10-08 8:12 ` Daniel Vetter
2015-10-08 10:28 ` Tomas Elf
2015-10-08 11:29 ` Tomas Elf
2015-10-08 22:46 ` David Woodhouse
2015-10-09 7:28 ` Daniel Vetter
2015-10-09 7:52 ` Daniel Vetter
2015-10-09 7:56 ` David Woodhouse
2015-10-09 8:47 ` Daniel Vetter
2015-10-09 9:07 ` David Woodhouse [this message]
2015-10-09 16:20 ` Jesse Barnes
2015-10-08 15:57 ` Chris Wilson
2015-10-09 7:24 ` David Woodhouse
2015-09-04 16:59 ` [PATCH 7/9] drm/i915: add fences to the request struct Jesse Barnes
2015-10-09 13:29 ` David Woodhouse
2015-10-09 16:11 ` Jesse Barnes
2015-09-04 16:59 ` [PATCH 8/9] drm/i915: Android sync points for i915 v4 (obsolete) Jesse Barnes
2015-09-04 16:59 ` [PATCH 9/9] drm/i915: add bufferless execbuf ioctl Jesse Barnes
2015-09-04 17:37 ` Chris Wilson
2015-09-04 19:09 ` Jesse Barnes
2015-10-08 10:34 ` David Woodhouse
2015-09-04 17:23 ` [RFC] Page table sharing and bufferless execbuf Chris Wilson
2015-09-04 19:08 ` Jesse Barnes
2015-09-26 14:55 ` David Woodhouse
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