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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Subject: [PATCH v3 08/13] drm/i915/gen9: Use dev_priv in csr functions
Date: Wed, 28 Oct 2015 23:59:02 +0200	[thread overview]
Message-ID: <1446069547-24760-9-git-send-email-imre.deak@intel.com> (raw)
In-Reply-To: <1446069547-24760-1-git-send-email-imre.deak@intel.com>

From: Daniel Vetter <daniel.vetter@intel.com>

As all csr firmware related opertion are not using any
any data structures of drm framework level, so better to
use dev_priv instead of dev. it's a new style! :)

Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Sunil Kamath <sunil.kamath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c  |  6 +++---
 drivers/gpu/drm/i915/i915_drv.c  |  4 +---
 drivers/gpu/drm/i915/intel_csr.c | 26 +++++++++++---------------
 drivers/gpu/drm/i915/intel_drv.h |  6 +++---
 4 files changed, 18 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 621914c..eddcbfd 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -398,7 +398,7 @@ static int i915_load_modeset_init(struct drm_device *dev)
 
 	intel_power_domains_init_hw(dev_priv);
 
-	intel_csr_ucode_init(dev);
+	intel_csr_ucode_init(dev_priv);
 
 	ret = intel_irq_install(dev_priv);
 	if (ret)
@@ -1116,7 +1116,7 @@ out_mtrrfree:
 out_gtt:
 	i915_global_gtt_cleanup(dev);
 out_freecsr:
-	intel_csr_ucode_fini(dev);
+	intel_csr_ucode_fini(dev_priv);
 	intel_uncore_fini(dev);
 	pci_iounmap(dev->pdev, dev_priv->regs);
 put_bridge:
@@ -1199,7 +1199,7 @@ int i915_driver_unload(struct drm_device *dev)
 	intel_fbc_cleanup_cfb(dev_priv);
 	i915_gem_cleanup_stolen(dev);
 
-	intel_csr_ucode_fini(dev);
+	intel_csr_ucode_fini(dev_priv);
 
 	intel_teardown_gmbus(dev);
 	intel_teardown_mchbar(dev);
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 366f832..eccdb41 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1081,13 +1081,11 @@ static int bxt_resume_prepare(struct drm_i915_private *dev_priv)
 
 static int skl_resume_prepare(struct drm_i915_private *dev_priv)
 {
-	struct drm_device *dev = dev_priv->dev;
-
 	if (dev_priv->csr.dmc_payload)
 		skl_disable_dc6(dev_priv);
 
 	skl_init_cdclk(dev_priv);
-	intel_csr_load_program(dev);
+	intel_csr_load_program(dev_priv);
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index bbf6b8d..d45920f 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -204,19 +204,18 @@ static char intel_get_substepping(struct drm_device *dev)
 
 /**
  * intel_csr_load_program() - write the firmware from memory to register.
- * @dev: drm device.
+ * @dev_priv: i915 drm device.
  *
  * CSR firmware is read from a .bin file and kept in internal memory one time.
  * Everytime display comes back from low power state this function is called to
  * copy the firmware from internal memory to registers.
  */
-void intel_csr_load_program(struct drm_device *dev)
+void intel_csr_load_program(struct drm_i915_private *dev_priv)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
 	u32 *payload = dev_priv->csr.dmc_payload;
 	uint32_t i, fw_size;
 
-	if (!IS_GEN9(dev)) {
+	if (!IS_GEN9(dev_priv)) {
 		DRM_ERROR("No CSR support available for this platform\n");
 		return;
 	}
@@ -365,7 +364,7 @@ static void finish_csr_load(const struct firmware *fw, void *context)
 	memcpy(dmc_payload, &fw->data[readcount], nbytes);
 
 	/* load csr program during system boot, as needed for DC states */
-	intel_csr_load_program(dev);
+	intel_csr_load_program(dev_priv);
 	fw_loaded = true;
 
 out:
@@ -385,21 +384,20 @@ out:
 
 /**
  * intel_csr_ucode_init() - initialize the firmware loading.
- * @dev: drm device.
+ * @dev_priv: i915 drm device.
  *
  * This function is called at the time of loading the display driver to read
  * firmware from a .bin file and copied into a internal memory.
  */
-void intel_csr_ucode_init(struct drm_device *dev)
+void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
 	struct intel_csr *csr = &dev_priv->csr;
 	int ret;
 
-	if (!HAS_CSR(dev))
+	if (!HAS_CSR(dev_priv))
 		return;
 
-	if (IS_SKYLAKE(dev))
+	if (IS_SKYLAKE(dev_priv))
 		csr->fw_path = I915_CSR_SKL;
 	else if (IS_BROXTON(dev_priv))
 		csr->fw_path = I915_CSR_BXT;
@@ -429,16 +427,14 @@ void intel_csr_ucode_init(struct drm_device *dev)
 
 /**
  * intel_csr_ucode_fini() - unload the CSR firmware.
- * @dev: drm device.
+ * @dev_priv: i915 drm device.
  *
  * Firmmware unloading includes freeing the internal momory and reset the
  * firmware loading status.
  */
-void intel_csr_ucode_fini(struct drm_device *dev)
+void intel_csr_ucode_fini(struct drm_i915_private *dev_priv)
 {
-	struct drm_i915_private *dev_priv = dev->dev_private;
-
-	if (!HAS_CSR(dev))
+	if (!HAS_CSR(dev_priv))
 		return;
 
 	kfree(dev_priv->csr.dmc_payload);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 2e48b3f..a2006b7 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1205,9 +1205,9 @@ u32 skl_plane_ctl_tiling(uint64_t fb_modifier);
 u32 skl_plane_ctl_rotation(unsigned int rotation);
 
 /* intel_csr.c */
-void intel_csr_ucode_init(struct drm_device *dev);
-void intel_csr_load_program(struct drm_device *dev);
-void intel_csr_ucode_fini(struct drm_device *dev);
+void intel_csr_ucode_init(struct drm_i915_private *);
+void intel_csr_load_program(struct drm_i915_private *);
+void intel_csr_ucode_fini(struct drm_i915_private *);
 
 /* intel_dp.c */
 void intel_dp_init(struct drm_device *dev, int output_reg, enum port port);
-- 
2.1.4

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  parent reply	other threads:[~2015-10-28 21:59 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-10-28 21:58 [PATCH v3 00/13] drm/i915: Redesign dmc firmware loading Imre Deak
2015-10-28 21:58 ` [PATCH v3 01/13] drm/i915/gen9: csr_init after runtime pm enable Imre Deak
2015-10-29 10:18   ` Sunil Kamath
2015-10-29 13:55     ` Imre Deak
2015-11-04  9:27       ` Sunil Kamath
2015-10-28 21:58 ` [PATCH v3 02/13] drm/i915: use correct power domain for csr loading Imre Deak
2015-10-28 21:58 ` [PATCH v3 03/13] drm/i915/gen9: move assert_csr_loaded into intel_rpm.c Imre Deak
2015-11-12 12:22   ` Imre Deak
2015-11-12 14:48     ` Jani Nikula
2015-11-12 15:09       ` Imre Deak
2015-10-28 21:58 ` [PATCH v3 04/13] drm/i915/gen9: Remove csr.state, csr_lock and related code Imre Deak
2015-10-29  9:02   ` Animesh Manna
2015-11-12 15:10   ` [PATCH v4 " Imre Deak
2015-10-28 21:58 ` [PATCH v3 05/13] drm/i915/gen9: Align line continuations in intel_csr.c Imre Deak
2015-10-28 21:59 ` [PATCH v3 06/13] drm/i915/gen9: Simplify csr loading failure printing Imre Deak
2015-10-28 21:59 ` [PATCH v3 07/13] drm/i915/gen9: Don't try to load garbage dmc firmware on resume Imre Deak
2015-10-28 21:59 ` Imre Deak [this message]
2015-10-28 21:59 ` [PATCH v3 09/13] drm/i915/gen9: extract parse_csr_fw Imre Deak
2015-11-12 15:11   ` [PATCH v4 " Imre Deak
2015-10-28 21:59 ` [PATCH v3 10/13] drm/i915: Use request_firmware and our own async work Imre Deak
2015-10-28 21:59 ` [PATCH v3 11/13] drm/i915/gen9: Use flush_work to synchronize with dmc loader Imre Deak
2015-10-28 21:59 ` [PATCH v3 12/13] drm/i915/gen9: flush DMC fw loading work during system suspend Imre Deak
2015-10-29  9:05   ` Animesh Manna
2015-10-28 21:59 ` [PATCH v3 13/13] drm/i915/skl: Removed assert for csr-fw-loading check during disabling dc6 Imre Deak
2015-10-29  8:08 ` [PATCH v3 00/13] drm/i915: Redesign dmc firmware loading Jani Nikula
2015-10-29 13:32   ` Imre Deak
2015-11-04 17:16 ` Daniel Stone
2015-11-12 15:37 ` Jani Nikula

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