Re: [PATCH 5/7] drm/i915/bxt: Expose DC5 entry count

[Imre Deak <imre.deak@intel.com>]

On ti, 2015-10-27 at 14:47 +0200, Mika Kuoppala wrote:
> For bxt CSR firmware exposes a count of dc5 entries. Expose
> it through debugs
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 3 +++
>  drivers/gpu/drm/i915/i915_reg.h     | 1 +
>  2 files changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index d8e9bc8..7a61599 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2811,6 +2811,9 @@ static int i915_dmc_info(struct seq_file *m, void *unused)
>  			   I915_READ(SKL_CSR_DC3_DC5_COUNT));
>  		seq_printf(m, "DC5 -> DC6 count: %d\n",
>  			   I915_READ(SKL_CSR_DC5_DC6_COUNT));
> +	} else if (IS_BROXTON(dev) && csr->version >= CSR_VERSION(1, 4)) {
> +		seq_printf(m, "DC3 -> DC5 count: %d\n",
> +			   I915_READ(BXT_CSR_DC3_DC5_COUNT));
>  	}
>  
>  	return 0;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index bf9bddd..c563ead 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5699,6 +5699,7 @@ enum skl_disp_power_wells {
>  /* DMC/CSR */
>  #define SKL_CSR_DC3_DC5_COUNT	0x80030
>  #define SKL_CSR_DC5_DC6_COUNT	0x8002C
> +#define BXT_CSR_DC3_DC5_COUNT	0x80038
>  
>  /* interrupts */
>  #define DE_MASTER_IRQ_CONTROL   (1 << 31)


_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx