[PATCH 0/8] Skylake DMC/DC-state fixes and redesign

Patrik Jakobsson
2015-11-03T12:31:36Z

These patches should sit on top of the DMC redesign patches from
Animesh/Imre [1] which in turn depends on Mika's FW debug patches [2].

First two patches are from Ville and is included since they otherwise
might be forgotten. The third from Ville helps with handling DC off when
doing Aux A communication.

[1]
http://lists.freedesktop.org/archives/intel-gfx/2015-October/079041.html

[2]
http://lists.freedesktop.org/archives/intel-gfx/2015-October/078898.html

Patrik Jakobsson (5):
drm/i915: Add a modeset power domain
drm/i915: Do not warn on PG2 enabled in gen9_disable_dc5()
drm/i915/skl: Turn DC handling into a power well
drm/i915/skl: Add boot parameter for disabling DC6
drm/i915: Force loading of csr program at boot

Ville Syrjälä (3):
drm/i915: Clean up AUX power domain handling
drm/i915: Introduce a gmbus power domain
drm/i915: Remove DDI power domain exclusion
SKL_DISPLAY_ALWAYS_ON_POWER_DOMAINS

drivers/gpu/drm/i915/i915_debugfs.c | 4 +
drivers/gpu/drm/i915/i915_drv.c | 8 +-
drivers/gpu/drm/i915/i915_drv.h | 5 +-
drivers/gpu/drm/i915/i915_params.c | 6 ++
drivers/gpu/drm/i915/intel_csr.c | 6 +-
drivers/gpu/drm/i915/intel_display.c | 46 ++++++++++
drivers/gpu/drm/i915/intel_dp.c | 48 +++--------
drivers/gpu/drm/i915/intel_drv.h | 6 +-
drivers/gpu/drm/i915/intel_hdmi.c | 8 +-
drivers/gpu/drm/i915/intel_i2c.c | 6 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 148 ++++++++++++++++----------------
11 files changed, 163 insertions(+), 128 deletions(-)

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2.1.4