From: Ander Conselvan De Oliveira <conselvan2@gmail.com>
To: "Thulasimani, Sivakumar" <sivakumar.thulasimani@intel.com>,
intel-gfx@lists.freedesktop.org, jim.bride@linux.intel.com
Subject: Re: [PATCH 07/22] drm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer
Date: Thu, 05 Nov 2015 15:22:55 +0200 [thread overview]
Message-ID: <1446729775.4176.3.camel@gmail.com> (raw)
In-Reply-To: <562C430D.5000805@intel.com>
On Sun, 2015-10-25 at 08:18 +0530, Thulasimani, Sivakumar wrote:
> Reviewed-by: Sivakumar Thulasimani <sivakumar.thulasimani@intel.com>
Thanks for reviewing. I pushed the patches up to here.
Ander
> On 10/23/2015 3:31 PM, Ander Conselvan de Oliveira wrote:
> > The function name implies it should get intel_dp, and it mostly used
> > where there is an intel_dp in the context.
> >
> > Signed-off-by: Ander Conselvan de Oliveira <
> > ander.conselvan.de.oliveira@intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_dp.c | 19 +++++++++++--------
> > drivers/gpu/drm/i915/intel_dp_link_training.c | 4 +---
> > drivers/gpu/drm/i915/intel_drv.h | 2 +-
> > 3 files changed, 13 insertions(+), 12 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c
> > b/drivers/gpu/drm/i915/intel_dp.c
> > index 5b04ade..5344de4 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -1189,8 +1189,11 @@ intel_dp_sink_rates(struct intel_dp *intel_dp, const
> > int **sink_rates)
> > return (intel_dp_max_link_bw(intel_dp) >> 3) + 1;
> > }
> >
> > -bool intel_dp_source_supports_hbr2(struct drm_device *dev)
> > +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)
> > {
> > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > + struct drm_device *dev = dig_port->base.base.dev;
> > +
> > /* WaDisableHBR2:skl */
> > if (IS_SKL_REVID(dev, 0, SKL_REVID_B0))
> > return false;
> > @@ -1203,8 +1206,10 @@ bool intel_dp_source_supports_hbr2(struct drm_device
> > *dev)
> > }
> >
> > static int
> > -intel_dp_source_rates(struct drm_device *dev, const int **source_rates)
> > +intel_dp_source_rates(struct intel_dp *intel_dp, const int **source_rates)
> > {
> > + struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > + struct drm_device *dev = dig_port->base.base.dev;
> > int size;
> >
> > if (IS_BROXTON(dev)) {
> > @@ -1219,7 +1224,7 @@ intel_dp_source_rates(struct drm_device *dev, const
> > int **source_rates)
> > }
> >
> > /* This depends on the fact that 5.4 is last value in the array */
> > - if (!intel_dp_source_supports_hbr2(dev))
> > + if (!intel_dp_source_supports_hbr2(intel_dp))
> > size--;
> >
> > return size;
> > @@ -1284,12 +1289,11 @@ static int intersect_rates(const int *source_rates,
> > int source_len,
> > static int intel_dp_common_rates(struct intel_dp *intel_dp,
> > int *common_rates)
> > {
> > - struct drm_device *dev = intel_dp_to_dev(intel_dp);
> > const int *source_rates, *sink_rates;
> > int source_len, sink_len;
> >
> > sink_len = intel_dp_sink_rates(intel_dp, &sink_rates);
> > - source_len = intel_dp_source_rates(dev, &source_rates);
> > + source_len = intel_dp_source_rates(intel_dp, &source_rates);
> >
> > return intersect_rates(source_rates, source_len,
> > sink_rates, sink_len,
> > @@ -1314,7 +1318,6 @@ static void snprintf_int_array(char *str, size_t len,
> >
> > static void intel_dp_print_rates(struct intel_dp *intel_dp)
> > {
> > - struct drm_device *dev = intel_dp_to_dev(intel_dp);
> > const int *source_rates, *sink_rates;
> > int source_len, sink_len, common_len;
> > int common_rates[DP_MAX_SUPPORTED_RATES];
> > @@ -1323,7 +1326,7 @@ static void intel_dp_print_rates(struct intel_dp
> > *intel_dp)
> > if ((drm_debug & DRM_UT_KMS) == 0)
> > return;
> >
> > - source_len = intel_dp_source_rates(dev, &source_rates);
> > + source_len = intel_dp_source_rates(intel_dp, &source_rates);
> > snprintf_int_array(str, sizeof(str), source_rates, source_len);
> > DRM_DEBUG_KMS("source rates: %s\n", str);
> >
> > @@ -3711,7 +3714,7 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
> > }
> >
> > DRM_DEBUG_KMS("Display Port TPS3 support: source %s, sink %s\n",
> > - yesno(intel_dp_source_supports_hbr2(dev)),
> > + yesno(intel_dp_source_supports_hbr2(intel_dp)),
> > yesno(drm_dp_tps3_supported(intel_dp->dpcd)));
> >
> > /* Intermediate frequency support */
> > diff --git a/drivers/gpu/drm/i915/intel_dp_link_training.c
> > b/drivers/gpu/drm/i915/intel_dp_link_training.c
> > index bb036d5..8888793 100644
> > --- a/drivers/gpu/drm/i915/intel_dp_link_training.c
> > +++ b/drivers/gpu/drm/i915/intel_dp_link_training.c
> > @@ -218,8 +218,6 @@ intel_dp_link_training_clock_recovery(struct intel_dp
> > *intel_dp)
> > static void
> > intel_dp_link_training_channel_equalization(struct intel_dp *intel_dp)
> > {
> > - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > - struct drm_device *dev = dig_port->base.base.dev;
> > bool channel_eq = false;
> > int tries, cr_tries;
> > uint32_t training_pattern = DP_TRAINING_PATTERN_2;
> > @@ -233,7 +231,7 @@ intel_dp_link_training_channel_equalization(struct
> > intel_dp *intel_dp)
> > * Due to WaDisableHBR2 SKL < B0 is the only exception where TPS3
> > is
> > * supported but still not enabled.
> > */
> > - if (intel_dp_source_supports_hbr2(dev) &&
> > + if (intel_dp_source_supports_hbr2(intel_dp) &&
> > drm_dp_tps3_supported(intel_dp->dpcd))
> > training_pattern = DP_TRAINING_PATTERN_3;
> > else if (intel_dp->link_rate == 540000)
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 1c2a8ed..3021e40 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -1252,7 +1252,7 @@ uint8_t
> > intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, uint8_t
> > voltage_swing);
> > void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
> > uint8_t *link_bw, uint8_t *rate_select);
> > -bool intel_dp_source_supports_hbr2(struct drm_device *dev);
> > +bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp);
> > bool
> > intel_dp_get_link_status(struct intel_dp *intel_dp, uint8_t
> > link_status[DP_LINK_STATUS_SIZE]);
> >
>
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> Intel-gfx@lists.freedesktop.org
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next prev parent reply other threads:[~2015-11-05 13:22 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-10-23 10:01 [PATCH 00/22] DP refactoring v2 Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 01/22] drm/i915: Don't pass *DP around to link training functions Ander Conselvan de Oliveira
2015-10-25 2:01 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 02/22] drm/i915: Split write of pattern to DP reg from intel_dp_set_link_train Ander Conselvan de Oliveira
2015-10-25 2:06 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 03/22] drm/i915 Call get_adjust_train() from clock recovery and channel eq Ander Conselvan de Oliveira
2015-10-25 2:11 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 04/22] drm/i915: Move register write into intel_dp_set_signal_levels() Ander Conselvan de Oliveira
2015-10-25 2:28 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 05/22] drm/i915: Move generic link training code to a separate file Ander Conselvan de Oliveira
2015-10-25 2:37 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 06/22] drm/i915: Create intel_dp->prepare_link_retrain() hook Ander Conselvan de Oliveira
2015-10-25 2:40 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 07/22] drm/i915: Make intel_dp_source_supports_hbr2() take an intel_dp pointer Ander Conselvan de Oliveira
2015-10-25 2:48 ` Thulasimani, Sivakumar
2015-11-05 13:22 ` Ander Conselvan De Oliveira [this message]
2015-10-23 10:01 ` [PATCH 08/22] drm/i915: Move link training setup code to separate functions (v2) Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 09/22] drm/i915: Move test for max voltage on all lanes to separate function Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 10/22] drm/i915: Add function for getting the current link training voltage Ander Conselvan de Oliveira
2015-10-25 3:56 ` Thulasimani, Sivakumar
2015-10-23 10:01 ` [PATCH 11/22] drm/i915: Split full retries loop out of clock recovery code (v2) Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 12/22] drm/i915: Make the link training test for same voltage smaller Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 13/22] drm/i915: Move the voltage changed check into intel_get_adjust_train() Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 14/22] drm/i915: Add missing newline to link training debug message Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 15/22] drm/i915: Split setting of vswing and pre_emph levels to separate file Ander Conselvan de Oliveira
2015-10-23 10:01 ` [PATCH 16/22] drm/i915: Introduce struct intel_dp_signal_levels Ander Conselvan de Oliveira
2015-10-25 5:24 ` Thulasimani, Sivakumar
2015-10-26 7:22 ` Ander Conselvan De Oliveira
2015-10-23 10:02 ` [PATCH 17/22] drm/i915: Use struct intel_dp_signal_levels for eDP on SNB and IVB Ander Conselvan de Oliveira
2015-10-23 10:02 ` [PATCH 18/22] drm/i915: Use struct intel_dp_signal_levels for VLV Ander Conselvan de Oliveira
2015-10-23 10:02 ` [PATCH 19/22] drm/i915: Use struct intel_dp_signal_levels for CHV Ander Conselvan de Oliveira
2015-10-23 10:02 ` [PATCH 20/22] drm/i915: Use struct intel_dp_signal_levels for DDI platforms Ander Conselvan de Oliveira
2015-10-23 10:02 ` [PATCH 21/22] drm/i915: Remove old functions for maximum DP vswing and pre-emph levels Ander Conselvan de Oliveira
2015-10-23 10:02 ` [PATCH 22/22] drm/i915: Move ddi_signal_levels() to intel_dp_signal_levels.c Ander Conselvan de Oliveira
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