From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>,
Mika Kuoppala <mika.kuoppala@intel.com>
Subject: Re: [PATCH 00/10] drm/i915/skl: fix display core init/uninit sequence
Date: Tue, 17 Nov 2015 21:34:57 +0200 [thread overview]
Message-ID: <1447788897.9159.18.camel@intel.com> (raw)
In-Reply-To: <1446657859-9598-1-git-send-email-imre.deak@intel.com>
On ke, 2015-11-04 at 19:24 +0200, Imre Deak wrote:
> Atm we toggle HW resources handled automatically by the DMC firmware.
> This is redundant and also interferes with the firmware's functionality.
> This patchset fixes this and also an old existing issue leaving RPM
> disabled all the time (see Damien's patch).
>
> The patchset depends on Mika's firmware version blacklisting/capture
> [1] and Animesh' firmware loading redesign [2] patchset. Both of these
> are reviewed now.
>
> This patchset also relates to Patrik's DC5/DC6 rework patchset [3], but
> it's not dependent on it. After discussing with him on IRC I'd suggest the
> following merge order:
>
> Patchset [1], patchset [2], Patrik's firmware programming fix from
> his patchset [4], this patchset, the rest of Patrik's patchset [3]. Feel
> free to suggest a different order.
>
> I tested this on top of [1], [2], [4] on SKL-Y with eDP and DP outputs,
> DC5/6, PC9/10 residencies and S3/S4 suspend/resume seemed to work as
> expected. The basic D3 igt tests are also passing, as claimed by
> Damien's patch.
I pushed the series to dinq, thanks for the review.
>
> [1]
> http://lists.freedesktop.org/archives/intel-gfx/2015-October/078898.html
>
> [2]
> http://lists.freedesktop.org/archives/intel-gfx/2015-October/079041.html
>
> [3]
> http://lists.freedesktop.org/archives/intel-gfx/2015-November/079343.html
>
> [4]
> http://lists.freedesktop.org/archives/intel-gfx/2015-November/079349.html
>
>
> Damien Lespiau (1):
> drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini
> sequences
>
> Imre Deak (9):
> drm/i915: fix the power well ID for always on wells
> drm/i915: fix lookup_power_well for power wells without any domain
> drm/i915: rename intel_power_domains_resume to *_sync_hw
> drm/i915/skl: init/uninit display core as part of the HW power domain
> state
> drm/i915/skl: don't toggle PW1 and MISC power wells on-demand
> drm/i915/gen9: simplify DC toggling code
> drm/i915/skl: disable DC states before display core init/uninit
> drm/i915/skl: make sure LCPLL is disabled when uniniting CDCLK
> drm/i915/skl: remove redundant DDI/IRQ reinitialization during PW1
> enabling
>
> drivers/gpu/drm/i915/i915_dma.c | 2 +-
> drivers/gpu/drm/i915/i915_drv.c | 9 +-
> drivers/gpu/drm/i915/i915_reg.h | 5 +-
> drivers/gpu/drm/i915/intel_ddi.c | 4 +-
> drivers/gpu/drm/i915/intel_display.c | 24 +---
> drivers/gpu/drm/i915/intel_drv.h | 5 +-
> drivers/gpu/drm/i915/intel_runtime_pm.c | 208 ++++++++++++++++++++------------
> 7 files changed, 149 insertions(+), 108 deletions(-)
>
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prev parent reply other threads:[~2015-11-17 19:35 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-04 17:24 [PATCH 00/10] drm/i915/skl: fix display core init/uninit sequence Imre Deak
2015-11-04 17:24 ` [PATCH 01/10] drm/i915: fix the power well ID for always on wells Imre Deak
2015-11-12 13:34 ` Patrik Jakobsson
2015-11-12 13:39 ` Ville Syrjälä
2015-11-12 13:57 ` Imre Deak
2015-11-04 17:24 ` [PATCH 02/10] drm/i915: fix lookup_power_well for power wells without any domain Imre Deak
2015-11-12 13:36 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 03/10] drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences Imre Deak
2015-11-12 13:49 ` Patrik Jakobsson
2015-11-17 19:19 ` Imre Deak
2015-11-04 17:24 ` [PATCH 04/10] drm/i915: rename intel_power_domains_resume to *_sync_hw Imre Deak
2015-11-12 13:53 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 05/10] drm/i915/skl: init/uninit display core as part of the HW power domain state Imre Deak
2015-11-13 9:02 ` Patrik Jakobsson
2015-11-17 15:33 ` [PATCH v2 " Imre Deak
2015-11-04 17:24 ` [PATCH 06/10] drm/i915/skl: don't toggle PW1 and MISC power wells on-demand Imre Deak
2015-11-13 9:31 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 07/10] drm/i915/gen9: simplify DC toggling code Imre Deak
2015-11-13 9:48 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 08/10] drm/i915/skl: disable DC states before display core init/uninit Imre Deak
2015-11-13 9:52 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 09/10] drm/i915/skl: make sure LCPLL is disabled when uniniting CDCLK Imre Deak
2015-11-13 10:11 ` Patrik Jakobsson
2015-11-04 17:24 ` [PATCH 10/10] drm/i915/skl: remove redundant DDI/IRQ reinitialization during PW1 enabling Imre Deak
2015-11-13 11:00 ` Patrik Jakobsson
2015-11-17 19:34 ` Imre Deak [this message]
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