Re: [PATCH 01/12] drm/i915: Move disable_cxsr to the crtc_state.

[Ander Conselvan De Oliveira <conselvan2@gmail.com>]

Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com>

On Thu, 2015-11-19 at 16:07 +0100, Maarten Lankhorst wrote:
> intel_crtc->atomic will be removed later on, move this member
> to intel_crtc_state.
> 
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_atomic.c  |  1 +
>  drivers/gpu/drm/i915/intel_display.c | 12 +++++++-----
>  drivers/gpu/drm/i915/intel_drv.h     |  4 ++--
>  3 files changed, 10 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_atomic.c
> b/drivers/gpu/drm/i915/intel_atomic.c
> index c4eadbc928b7..9f0638a37b6d 100644
> --- a/drivers/gpu/drm/i915/intel_atomic.c
> +++ b/drivers/gpu/drm/i915/intel_atomic.c
> @@ -95,6 +95,7 @@ intel_crtc_duplicate_state(struct drm_crtc *crtc)
>  
>  	crtc_state->update_pipe = false;
>  	crtc_state->disable_lp_wm = false;
> +	crtc_state->disable_cxsr = false;
>  
>  	return &crtc_state->base;
>  }
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index f8c332aee1e0..5ee64e67ad8a 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4749,8 +4749,7 @@ static void intel_post_plane_update(struct intel_crtc
> *crtc)
>  
>  	intel_frontbuffer_flip(dev, atomic->fb_bits);
>  
> -	if (atomic->disable_cxsr)
> -		crtc->wm.cxsr_allowed = true;
> +	crtc->wm.cxsr_allowed = true;
>  
>  	if (crtc->atomic.update_wm_post)
>  		intel_update_watermarks(&crtc->base);
> @@ -4769,6 +4768,8 @@ static void intel_pre_plane_update(struct intel_crtc
> *crtc)
>  	struct drm_device *dev = crtc->base.dev;
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
> +	struct intel_crtc_state *pipe_config =
> +		to_intel_crtc_state(crtc->base.state);
>  
>  	if (atomic->disable_fbc)
>  		intel_fbc_disable_crtc(crtc);
> @@ -4779,7 +4780,7 @@ static void intel_pre_plane_update(struct intel_crtc
> *crtc)
>  	if (atomic->pre_disable_primary)
>  		intel_pre_disable_primary(&crtc->base);
>  
> -	if (atomic->disable_cxsr) {
> +	if (pipe_config->disable_cxsr) {
>  		crtc->wm.cxsr_allowed = false;
>  		intel_set_memory_cxsr(dev_priv, false);
>  	}
> @@ -11658,6 +11659,7 @@ static bool needs_scaling(struct intel_plane_state
> *state)
>  int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
>  				    struct drm_plane_state *plane_state)
>  {
> +	struct intel_crtc_state *pipe_config =
> to_intel_crtc_state(crtc_state);
>  	struct drm_crtc *crtc = crtc_state->crtc;
>  	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>  	struct drm_plane *plane = plane_state->plane;
> @@ -11708,7 +11710,7 @@ int intel_plane_atomic_calc_changes(struct
> drm_crtc_state *crtc_state,
>  		intel_crtc->atomic.update_wm_pre = true;
>  		/* must disable cxsr around plane enable/disable */
>  		if (plane->type != DRM_PLANE_TYPE_CURSOR) {
> -			intel_crtc->atomic.disable_cxsr = true;
> +			pipe_config->disable_cxsr = true;
>  			/* to potentially re-enable cxsr */
>  			intel_crtc->atomic.wait_vblank = true;
>  			intel_crtc->atomic.update_wm_post = true;
> @@ -11719,7 +11721,7 @@ int intel_plane_atomic_calc_changes(struct
> drm_crtc_state *crtc_state,
>  		if (plane->type != DRM_PLANE_TYPE_CURSOR) {
>  			if (is_crtc_enabled)
>  				intel_crtc->atomic.wait_vblank = true;
> -			intel_crtc->atomic.disable_cxsr = true;
> +			pipe_config->disable_cxsr = true;
>  		}
>  	} else if (intel_wm_need_update(plane, plane_state)) {
>  		intel_crtc->atomic.update_wm_pre = true;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 725973ebf49f..dd89342832e2 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -370,7 +370,8 @@ struct intel_crtc_state {
>  #define PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS	(1<<0) /* unreliable sync
> mode.flags */
>  	unsigned long quirks;
>  
> -	bool update_pipe;
> +	bool update_pipe; /* can a fast modeset be performed? */
> +	bool disable_cxsr;
>  
>  	/* Pipe source size (ie. panel fitter input size)
>  	 * All planes will be positioned inside this space,
> @@ -533,7 +534,6 @@ struct intel_crtc_atomic_commit {
>  	/* Sleepable operations to perform before commit */
>  	bool disable_fbc;
>  	bool disable_ips;
> -	bool disable_cxsr;
>  	bool pre_disable_primary;
>  	bool update_wm_pre, update_wm_post;
>  
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx