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From: tom.orourke@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Tom O'Rourke <Tom.O'Rourke@intel.com>
Subject: [RFC 19/22] drm/i915/slpc: Add parameter unset/set/get functions
Date: Wed, 20 Jan 2016 18:26:21 -0800	[thread overview]
Message-ID: <1453343184-160456-20-git-send-email-tom.orourke@intel.com> (raw)
In-Reply-To: <1453343184-160456-1-git-send-email-tom.orourke@intel.com>

From: Tom O'Rourke <Tom.O'Rourke@intel.com>

Add slcp_param_id enum values.
Add events for setting/unsetting parameters.

Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
---
 drivers/gpu/drm/i915/intel_slpc.c | 127 ++++++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_slpc.h |  22 +++++++
 2 files changed, 149 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
index 36aedb9..3abaf0b 100644
--- a/drivers/gpu/drm/i915/intel_slpc.c
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -119,6 +119,47 @@ static int host2guc_slpc_query_task_state(struct drm_i915_private *dev_priv)
 	return ret;
 }
 
+static int host2guc_slpc_set_param(struct drm_i915_private *dev_priv,
+				   enum slpc_param_id id, u32 value)
+{
+	u32 data[4];
+	int ret;
+
+	data[0] = HOST2GUC_ACTION_SLPC_REQUEST;
+	data[1] = SLPC_EVENT(SLPC_EVENT_PARAMETER_SET, 2);
+	data[2] = (u32) id;
+	data[3] = value;
+
+	ret = host2guc_action(&dev_priv->guc, data, 4);
+
+	if (0 == ret) {
+		ret = I915_READ(SOFT_SCRATCH(1));
+		ret &= 0xFF;
+	}
+
+	return ret;
+}
+
+static int host2guc_slpc_unset_param(struct drm_i915_private *dev_priv,
+				     enum slpc_param_id id)
+{
+	u32 data[3];
+	int ret;
+
+	data[0] = HOST2GUC_ACTION_SLPC_REQUEST;
+	data[1] = SLPC_EVENT(SLPC_EVENT_PARAMETER_UNSET, 1);
+	data[2] = (u32) id;
+
+	ret = host2guc_action(&dev_priv->guc, data, 3);
+
+	if (0 == ret) {
+		ret = I915_READ(SOFT_SCRATCH(1));
+		ret &= 0xFF;
+	}
+
+	return ret;
+}
+
 static u8 slpc_get_platform_sku(struct drm_i915_gem_object *obj)
 {
 	struct drm_device *dev = obj->base.dev;
@@ -370,3 +411,89 @@ int intel_slpc_query_task_state(struct drm_device *dev)
 
 	return host2guc_slpc_query_task_state(dev_priv);
 }
+
+int intel_slpc_unset_param(struct drm_device *dev, enum slpc_param_id id)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj;
+	struct page *page;
+	struct slpc_shared_data *data = NULL;
+	int ret = 0;
+
+	obj = dev_priv->guc.slpc.shared_data_obj;
+	if (obj) {
+		page = i915_gem_object_get_page(obj, 0);
+		if (page)
+			data = kmap_atomic(page);
+	}
+
+	if (data) {
+		data->override_parameters_set_bits[id >> 5]
+							&= (~(1 << (id % 32)));
+		data->override_parameters_values[id] = 0;
+		kunmap_atomic(data);
+
+		ret = host2guc_slpc_unset_param(dev_priv, id);
+	}
+
+	return ret;
+}
+
+int intel_slpc_set_param(struct drm_device *dev, enum slpc_param_id id,
+                         u32 value)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj;
+	struct page *page;
+	struct slpc_shared_data *data = NULL;
+	int ret = 0;
+
+	obj = dev_priv->guc.slpc.shared_data_obj;
+	if (obj) {
+		page = i915_gem_object_get_page(obj, 0);
+		if (page)
+			data = kmap_atomic(page);
+	}
+
+	if (data) {
+		data->override_parameters_set_bits[id >> 5]
+							|= (1 << (id % 32));
+		data->override_parameters_values[id] = value;
+		kunmap_atomic(data);
+
+		ret = host2guc_slpc_set_param(dev_priv, id, value);
+	}
+
+	return ret;
+}
+
+int intel_slpc_get_param(struct drm_device *dev, enum slpc_param_id id,
+                         int *overriding, u32 *value)
+{
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct drm_i915_gem_object *obj;
+	struct page *page;
+	struct slpc_shared_data *data = NULL;
+	u32 bits;
+	int ret = 0;
+
+	obj = dev_priv->guc.slpc.shared_data_obj;
+	if (obj) {
+		page = i915_gem_object_get_page(obj, 0);
+		if (page)
+			data = kmap_atomic(page);
+	}
+
+	if (data) {
+		if (overriding) {
+			bits = data->override_parameters_set_bits[id >> 5];
+			*overriding = (0 != (bits & (1 << (id % 32))));
+		}
+		if (value)
+			*value = data->override_parameters_values[id];
+
+		kunmap_atomic(data);
+	}
+
+	return ret;
+}
diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h
index 32d7dcc..fc74ce3 100644
--- a/drivers/gpu/drm/i915/intel_slpc.h
+++ b/drivers/gpu/drm/i915/intel_slpc.h
@@ -68,6 +68,23 @@ enum slpc_event_id {
 
 #define SLPC_EVENT(id, argc) ((u32) (id) << 8 | (argc))
 
+enum slpc_param_id {
+	SLPC_PARAM_TASK_ENABLE_DFPS = 2,
+	SLPC_PARAM_TASK_DISABLE_DFPS = 3,
+	SLPC_PARAM_TASK_ENABLE_TURBO = 4,
+	SLPC_PARAM_TASK_DISABLE_TURBO = 5,
+	SLPC_PARAM_TASK_ENABLE_DCC = 6,
+	SLPC_PARAM_TASK_DISABLE_DCC = 7,
+	SLPC_PARAM_GLOBAL_MIN_GT_FREQ_MHZ = 8,
+	SLPC_PARAM_GLOBAL_MAX_GT_FREQ_MHZ = 9,
+	SLPC_PARAM_DFPS_THRESHOLD_MAX_FPS = 10,
+	SLPC_PARAM_GLOBAL_DISABLE_GT_FREQ_MANAGEMENT = 11,
+	SLPC_PARAM_DFPS_DISABLE_FRAMERATE_STALLING = 12,
+	SLPC_PARAM_GLOBAL_DISABLE_RC6_MODE_CHANGE = 13,
+	SLPC_PARAM_GLOBAL_OC_UNSLICE_FREQ_MHZ = 14,
+	SLPC_PARAM_GLOBAL_OC_SLICE_FREQ_MHZ = 15,
+};
+
 enum slpc_global_state {
 	SLPC_GLOBAL_STATE_NOT_RUNNING = 0,
 	SLPC_GLOBAL_STATE_INITIALIZING = 1,
@@ -182,4 +199,9 @@ int intel_slpc_update_display_mode_info(struct drm_device *dev);
 int intel_slpc_update_display_rr_info(struct drm_device *dev, u32 refresh_rate);
 
 int intel_slpc_query_task_state(struct drm_device *dev);
+int intel_slpc_unset_param(struct drm_device *dev, enum slpc_param_id id);
+int intel_slpc_set_param(struct drm_device *dev, enum slpc_param_id id,
+			 u32 value);
+int intel_slpc_get_param(struct drm_device *dev, enum slpc_param_id id,
+			 int *overriding, u32 *value);
 #endif
-- 
1.9.1

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  parent reply	other threads:[~2016-01-21  2:27 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-21  2:26 [RFC 00/22] Add support for GuC-based SLPC tom.orourke
2016-01-21  2:26 ` [RFC 01/22] drm/i915: Enable GuC submission, where supported tom.orourke
2016-01-21  2:26 ` [RFC 02/22] drm/i915/slpc: Add has_slpc capability flag tom.orourke
2016-01-21  2:26 ` [RFC 03/22] drm/i915/slpc: Expose guc functions for use with SLPC tom.orourke
2016-01-21  2:26 ` [RFC 04/22] drm/i915/slpc: Use intel_slpc_* functions if supported tom.orourke
2016-01-21  2:26 ` [RFC 05/22] drm/i915/slpc: Enable/Disable RC6 in SLPC flows tom.orourke
2016-01-21  2:26 ` [RFC 06/22] drm/i915/slpc: If using SLPC, do not set frequency tom.orourke
2016-01-22 16:53   ` Daniel Vetter
2016-01-22 17:22     ` Daniel Vetter
2016-01-21  2:26 ` [RFC 07/22] drm/i915/slpc: Enable SLPC in guc if supported tom.orourke
2016-01-21  2:26 ` [RFC 08/22] drm/i915/slpc: Allocate/Release/Initialize SLPC shared data tom.orourke
2016-01-21  2:26 ` [RFC 09/22] drm/i915/slpc: Setup rps frequency values during SLPC init tom.orourke
2016-01-21  2:26 ` [RFC 10/22] drm/i915/slpc: Update current requested frequency tom.orourke
2016-01-21  2:26 ` [RFC 11/22] drm/i915/slpc: Send reset event tom.orourke
2016-01-21  2:26 ` [RFC 12/22] drm/i915/slpc: Send shutdown event tom.orourke
2016-01-21  2:26 ` [RFC 13/22] drm/i915/slpc: Add Display mode event related data structures tom.orourke
2016-01-21  2:26 ` [RFC 14/22] drm/i915/slpc: Notification of Display mode change tom.orourke
2016-01-21 13:24   ` Zanoni, Paulo R
2016-01-28  9:43     ` Kamble, Sagar A
2016-01-22 17:14   ` Ville Syrjälä
2016-01-29  5:00     ` Kamble, Sagar A
2016-01-21  2:26 ` [RFC 15/22] drm/i915/slpc: Notification of Refresh Rate change tom.orourke
2016-01-21  2:26 ` [RFC 16/22] drm/i915/slpc: Add slpc_status enum values tom.orourke
2016-01-21  2:26 ` [RFC 17/22] drm/i915/slpc: Add i915_slpc_info to debugfs tom.orourke
2016-01-21  2:26 ` [RFC 18/22] drm/i915/slpc: Add dfps task info to i915_slpc_info tom.orourke
2016-01-21  2:26 ` tom.orourke [this message]
2016-01-21  2:26 ` [RFC 20/22] drm/i915/slpc: Add slpc support for max/min freq tom.orourke
2016-01-21  2:26 ` [RFC 21/22] drm/i915/slpc: Add enable/disable debugfs for slpc tom.orourke
2016-01-21  2:26 ` [RFC 22/22] drm/i915/slpc: Add has_slpc to skylake info tom.orourke
2016-01-21 13:50 ` ✗ Fi.CI.BAT: failure for Add support for GuC-based SLPC Patchwork
2016-01-21 23:16   ` O'Rourke, Tom
2016-01-22 17:07     ` Daniel Vetter
2016-01-22 17:00 ` [RFC 00/22] " Daniel Vetter
2016-01-26 15:45   ` Jesse Barnes
2016-01-26 17:00     ` Daniel Vetter
2016-01-26 17:17       ` Jesse Barnes
2016-01-27  1:17         ` O'Rourke, Tom
2016-02-09 12:08       ` Martin Peres
2016-02-10  7:37         ` Daniel Vetter
2016-02-10 10:31           ` Martin Peres
2016-02-03 20:25 ` Zanoni, Paulo R
2016-02-09  7:03   ` Kamble, Sagar A
2016-02-11 20:10     ` Zanoni, Paulo R
2016-02-09 11:56 ` Martin Peres

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