From: tom.orourke@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Tom O'Rourke <Tom.O'Rourke@intel.com>
Subject: [RFC 04/22] drm/i915/slpc: Use intel_slpc_* functions if supported
Date: Wed, 20 Jan 2016 18:26:06 -0800 [thread overview]
Message-ID: <1453343184-160456-5-git-send-email-tom.orourke@intel.com> (raw)
In-Reply-To: <1453343184-160456-1-git-send-email-tom.orourke@intel.com>
From: Tom O'Rourke <Tom.O'Rourke@intel.com>
On platforms with SLPC support: call intel_slpc_*()
functions from corresponding intel_*_gt_powersave()
functions; and do not use rps functions.
Signed-off-by: Tom O'Rourke <Tom.O'Rourke@intel.com>
---
drivers/gpu/drm/i915/Makefile | 5 +--
drivers/gpu/drm/i915/intel_pm.c | 36 +++++++++++++++------
drivers/gpu/drm/i915/intel_slpc.c | 68 +++++++++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_slpc.h | 35 ++++++++++++++++++++
4 files changed, 132 insertions(+), 12 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_slpc.c
create mode 100644 drivers/gpu/drm/i915/intel_slpc.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 0851de07..92b378b 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -41,8 +41,9 @@ i915-y += i915_cmd_parser.o \
intel_uncore.o
# general-purpose microcontroller (GuC) support
-i915-y += intel_guc_loader.o \
- i915_guc_submission.o
+i915-y += i915_guc_submission.o \
+ intel_guc_loader.o \
+ intel_slpc.o
# autogenerated null render state
i915-y += intel_renderstate_gen6.o \
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 20bf854..27713ab 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6067,7 +6067,9 @@ void intel_init_gt_powersave(struct drm_device *dev)
intel_runtime_pm_get(dev_priv);
}
- if (IS_CHERRYVIEW(dev))
+ if (HAS_SLPC(dev))
+ intel_slpc_init(dev);
+ else if (IS_CHERRYVIEW(dev))
cherryview_init_gt_powersave(dev);
else if (IS_VALLEYVIEW(dev))
valleyview_init_gt_powersave(dev);
@@ -6076,8 +6078,10 @@ void intel_init_gt_powersave(struct drm_device *dev)
void intel_cleanup_gt_powersave(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
-
- if (IS_CHERRYVIEW(dev))
+
+ if (HAS_SLPC(dev))
+ intel_slpc_cleanup(dev);
+ else if (IS_CHERRYVIEW(dev))
return;
else if (IS_VALLEYVIEW(dev))
valleyview_cleanup_gt_powersave(dev);
@@ -6110,17 +6114,23 @@ void intel_suspend_gt_powersave(struct drm_device *dev)
if (INTEL_INFO(dev)->gen < 6)
return;
- gen6_suspend_rps(dev);
+ if (HAS_SLPC(dev)) {
+ intel_slpc_suspend(dev);
+ } else {
+ gen6_suspend_rps(dev);
- /* Force GPU to min freq during suspend */
- gen6_rps_idle(dev_priv);
+ /* Force GPU to min freq during suspend */
+ gen6_rps_idle(dev_priv);
+ }
}
void intel_disable_gt_powersave(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = dev->dev_private;
- if (IS_IRONLAKE_M(dev)) {
+ if (HAS_SLPC(dev)) {
+ intel_slpc_disable(dev);
+ } else if (IS_IRONLAKE_M(dev)) {
ironlake_disable_drps(dev);
} else if (INTEL_INFO(dev)->gen >= 6) {
intel_suspend_gt_powersave(dev);
@@ -6191,7 +6201,9 @@ void intel_enable_gt_powersave(struct drm_device *dev)
if (intel_vgpu_active(dev))
return;
- if (IS_IRONLAKE_M(dev)) {
+ if (HAS_SLPC(dev)) {
+ intel_slpc_enable(dev);
+ } else if (IS_IRONLAKE_M(dev)) {
mutex_lock(&dev->struct_mutex);
ironlake_enable_drps(dev);
intel_init_emon(dev);
@@ -6222,8 +6234,12 @@ void intel_reset_gt_powersave(struct drm_device *dev)
if (INTEL_INFO(dev)->gen < 6)
return;
- gen6_suspend_rps(dev);
- dev_priv->rps.enabled = false;
+ if (HAS_SLPC(dev)) {
+ intel_slpc_reset(dev);
+ } else {
+ gen6_suspend_rps(dev);
+ dev_priv->rps.enabled = false;
+ }
}
static void ibx_init_clock_gating(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_slpc.c b/drivers/gpu/drm/i915/intel_slpc.c
new file mode 100644
index 0000000..dcd237f
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_slpc.c
@@ -0,0 +1,68 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+#include <linux/firmware.h>
+#include "i915_drv.h"
+#include "intel_guc.h"
+
+int intel_slpc_init(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ return 0;
+}
+
+int intel_slpc_cleanup(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ return 0;
+}
+
+int intel_slpc_suspend(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ return 0;
+}
+
+int intel_slpc_disable(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ return 0;
+}
+
+int intel_slpc_enable(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ return 0;
+}
+
+int intel_slpc_reset(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/i915/intel_slpc.h b/drivers/gpu/drm/i915/intel_slpc.h
new file mode 100644
index 0000000..8f13fb5
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_slpc.h
@@ -0,0 +1,35 @@
+/*
+ * Copyright © 2015 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+#ifndef _INTEL_SLPC_H_
+#define _INTEL_SLPC_H_
+
+/* intel_slpc.c */
+int intel_slpc_init(struct drm_device *dev);
+int intel_slpc_cleanup(struct drm_device *dev);
+int intel_slpc_suspend(struct drm_device *dev);
+int intel_slpc_disable(struct drm_device *dev);
+int intel_slpc_enable(struct drm_device *dev);
+int intel_slpc_reset(struct drm_device *dev);
+
+#endif
--
1.9.1
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next prev parent reply other threads:[~2016-01-21 2:27 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 2:26 [RFC 00/22] Add support for GuC-based SLPC tom.orourke
2016-01-21 2:26 ` [RFC 01/22] drm/i915: Enable GuC submission, where supported tom.orourke
2016-01-21 2:26 ` [RFC 02/22] drm/i915/slpc: Add has_slpc capability flag tom.orourke
2016-01-21 2:26 ` [RFC 03/22] drm/i915/slpc: Expose guc functions for use with SLPC tom.orourke
2016-01-21 2:26 ` tom.orourke [this message]
2016-01-21 2:26 ` [RFC 05/22] drm/i915/slpc: Enable/Disable RC6 in SLPC flows tom.orourke
2016-01-21 2:26 ` [RFC 06/22] drm/i915/slpc: If using SLPC, do not set frequency tom.orourke
2016-01-22 16:53 ` Daniel Vetter
2016-01-22 17:22 ` Daniel Vetter
2016-01-21 2:26 ` [RFC 07/22] drm/i915/slpc: Enable SLPC in guc if supported tom.orourke
2016-01-21 2:26 ` [RFC 08/22] drm/i915/slpc: Allocate/Release/Initialize SLPC shared data tom.orourke
2016-01-21 2:26 ` [RFC 09/22] drm/i915/slpc: Setup rps frequency values during SLPC init tom.orourke
2016-01-21 2:26 ` [RFC 10/22] drm/i915/slpc: Update current requested frequency tom.orourke
2016-01-21 2:26 ` [RFC 11/22] drm/i915/slpc: Send reset event tom.orourke
2016-01-21 2:26 ` [RFC 12/22] drm/i915/slpc: Send shutdown event tom.orourke
2016-01-21 2:26 ` [RFC 13/22] drm/i915/slpc: Add Display mode event related data structures tom.orourke
2016-01-21 2:26 ` [RFC 14/22] drm/i915/slpc: Notification of Display mode change tom.orourke
2016-01-21 13:24 ` Zanoni, Paulo R
2016-01-28 9:43 ` Kamble, Sagar A
2016-01-22 17:14 ` Ville Syrjälä
2016-01-29 5:00 ` Kamble, Sagar A
2016-01-21 2:26 ` [RFC 15/22] drm/i915/slpc: Notification of Refresh Rate change tom.orourke
2016-01-21 2:26 ` [RFC 16/22] drm/i915/slpc: Add slpc_status enum values tom.orourke
2016-01-21 2:26 ` [RFC 17/22] drm/i915/slpc: Add i915_slpc_info to debugfs tom.orourke
2016-01-21 2:26 ` [RFC 18/22] drm/i915/slpc: Add dfps task info to i915_slpc_info tom.orourke
2016-01-21 2:26 ` [RFC 19/22] drm/i915/slpc: Add parameter unset/set/get functions tom.orourke
2016-01-21 2:26 ` [RFC 20/22] drm/i915/slpc: Add slpc support for max/min freq tom.orourke
2016-01-21 2:26 ` [RFC 21/22] drm/i915/slpc: Add enable/disable debugfs for slpc tom.orourke
2016-01-21 2:26 ` [RFC 22/22] drm/i915/slpc: Add has_slpc to skylake info tom.orourke
2016-01-21 13:50 ` ✗ Fi.CI.BAT: failure for Add support for GuC-based SLPC Patchwork
2016-01-21 23:16 ` O'Rourke, Tom
2016-01-22 17:07 ` Daniel Vetter
2016-01-22 17:00 ` [RFC 00/22] " Daniel Vetter
2016-01-26 15:45 ` Jesse Barnes
2016-01-26 17:00 ` Daniel Vetter
2016-01-26 17:17 ` Jesse Barnes
2016-01-27 1:17 ` O'Rourke, Tom
2016-02-09 12:08 ` Martin Peres
2016-02-10 7:37 ` Daniel Vetter
2016-02-10 10:31 ` Martin Peres
2016-02-03 20:25 ` Zanoni, Paulo R
2016-02-09 7:03 ` Kamble, Sagar A
2016-02-11 20:10 ` Zanoni, Paulo R
2016-02-09 11:56 ` Martin Peres
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