From: Peter Antoine <peter.antoine@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: daniel.vetter@ffwll.ch, dave.gordon@intel.com
Subject: [PATCH v2 2/2] drm/i915: resize the GuC WOPCM for rc6
Date: Thu, 21 Jan 2016 18:11:01 +0000 [thread overview]
Message-ID: <1453399861-5557-3-git-send-email-peter.antoine@intel.com> (raw)
In-Reply-To: <1453399861-5557-1-git-send-email-peter.antoine@intel.com>
This patch resizes the GuC WOPCM to so that the GuC and the RC6 memory
spaces do not overlap.
Issue: https://jira01.devtools.intel.com/browse/VIZ-6638
Signed-off-by: Peter Antoine <peter.antoine@intel.com>
---
drivers/gpu/drm/i915/i915_guc_reg.h | 3 ++-
drivers/gpu/drm/i915/intel_guc_loader.c | 6 +++++-
2 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h b/drivers/gpu/drm/i915/i915_guc_reg.h
index 685c799..cb938b0 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -58,7 +58,8 @@
#define GUC_MAX_IDLE_COUNT _MMIO(0xC3E4)
#define GUC_WOPCM_SIZE _MMIO(0xc050)
-#define GUC_WOPCM_SIZE_VALUE (0x80 << 12) /* 512KB */
+#define GUC_WOPCM_SIZE_VALUE (0x80 << 12) /* 512KB */
+#define BXT_GUC_WOPCM_SIZE_VALUE (0x70 << 12) /* 448KB */
/* GuC addresses below GUC_WOPCM_TOP don't map through the GTT */
#define GUC_WOPCM_TOP (GUC_WOPCM_SIZE_VALUE)
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index 8182d11..69c85d1 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -304,7 +304,11 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
/* init WOPCM */
- I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
+ if (IS_BROXTON(dev))
+ I915_WRITE(GUC_WOPCM_SIZE, BXT_GUC_WOPCM_SIZE_VALUE);
+ else
+ I915_WRITE(GUC_WOPCM_SIZE, GUC_WOPCM_SIZE_VALUE);
+
I915_WRITE(DMA_GUC_WOPCM_OFFSET, GUC_WOPCM_OFFSET_VALUE);
/* Enable MIA caching. GuC clock gating is disabled. */
--
1.9.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-01-21 18:11 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-01-21 18:10 [PATCH v2 0/2] Enabling GuC Loading on Broxton Peter Antoine
2016-01-21 18:11 ` [PATCH v2 1/2] drm/i915: Adding Broxton GuC Loader Support Peter Antoine
2016-01-21 18:11 ` Peter Antoine [this message]
2016-01-21 21:41 ` [PATCH v2 2/2] drm/i915: resize the GuC WOPCM for rc6 Jeff McGee
2016-01-22 9:45 ` Peter Antoine
2016-02-03 15:39 ` Dave Gordon
2016-04-05 16:27 ` Rodrigo Vivi
2016-04-06 8:32 ` Peter Antoine
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1453399861-5557-3-git-send-email-peter.antoine@intel.com \
--to=peter.antoine@intel.com \
--cc=daniel.vetter@ffwll.ch \
--cc=dave.gordon@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).