[PATCH v2 4/5] drm/i915: Add support for write-combined CPU mapping to DRM_IOCTL_I915_GEM_MMAP_GTT

[Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>]

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Old DRM_IOCTL_I915_GEM_MMAP supported write-combine mapping so
add support for it here as well.

v2: Commit msg.

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 34 +++++++++++++++++++++++++++-------
 include/uapi/drm/i915_drm.h     |  3 ++-
 2 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index a690cee31f20..642c75a5530e 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1954,8 +1954,8 @@ out:
 	return i915_gem_ret_to_vm_ret(dev_priv, ret);
 }
 
-static int
-i915_gem_cpu_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+static inline int
+__i915_gem_cpu_fault(struct vm_area_struct *vma, struct vm_fault *vmf, bool wc)
 {
 	struct drm_i915_gem_object *obj = to_intel_bo(vma->vm_private_data);
 	struct drm_device *dev = obj->base.dev;
@@ -1992,7 +1992,7 @@ i915_gem_cpu_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 
 	ret = vm_insert_pfn(vma, (unsigned long)vmf->virtual_address,
 			    page_to_pfn(page));
-	if (ret == 0) {
+	if (ret == 0 && !wc) {
 		/* DRM core sets up WC by default and we want WB. */
 		pgprot = pgprot_val(vm_get_page_prot(vma->vm_flags));
 		pgprot &= ~_PAGE_CACHE_MASK;
@@ -2010,6 +2010,18 @@ out:
 	return i915_gem_ret_to_vm_ret(dev_priv, ret);
 }
 
+static int
+i915_gem_cpu_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+{
+	return __i915_gem_cpu_fault(vma, vmf, false);
+}
+
+static int
+i915_gem_cpu_wc_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+{
+	return __i915_gem_cpu_fault(vma, vmf, true);
+}
+
 /**
  * i915_gem_release_mmap - remove physical page mappings
  * @obj: obj in question
@@ -2140,6 +2152,12 @@ static const struct vm_operations_struct i915_gem_cpu_vm_ops = {
 	.close = drm_gem_vm_close,
 };
 
+static const struct vm_operations_struct i915_gem_cpu_wc_vm_ops = {
+	.fault = i915_gem_cpu_wc_fault,
+	.open = drm_gem_vm_open,
+	.close = drm_gem_vm_close,
+};
+
 static int
 i915_gem_mmap(struct drm_file *file,
 	      struct drm_device *dev,
@@ -2176,12 +2194,14 @@ i915_gem_mmap(struct drm_file *file,
 	if (ret)
 		goto out;
 
-	if (flags & I915_MMAP2_CPU) {
+	if (flags & I915_MMAP2_CPU_WC)
+		ret = drm_vma_node_set_vm_ops(&obj->base.vma_node,
+					      &i915_gem_cpu_wc_vm_ops);
+	else if (flags & I915_MMAP2_CPU)
 		ret = drm_vma_node_set_vm_ops(&obj->base.vma_node,
 					      &i915_gem_cpu_vm_ops);
-		if (ret)
-			goto out;
-	}
+	if (ret)
+		goto out;
 
 	*offset = drm_vma_node_offset_addr(&obj->base.vma_node);
 
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 359a36d604bb..05e74c7aef4f 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -529,7 +529,8 @@ struct drm_i915_gem_mmap_gtt {
 	 */
 	__u64 offset;
 
-#define I915_MMAP2_CPU   0x1
+#define I915_MMAP2_CPU    0x1
+#define I915_MMAP2_CPU_WC 0x3
 	__u64 flags;
 };
 
-- 
1.9.1

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