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From: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>
To: "mathew.j.martineau@linux.intel.com"
	<mathew.j.martineau@linux.intel.com>,
	"Vetter, Daniel" <daniel.vetter@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/skl: Fix DMC load on Skylake J0 and K0
Date: Mon, 1 Feb 2016 17:00:54 +0000	[thread overview]
Message-ID: <1454346065.12448.164.camel@intel.com> (raw)
In-Reply-To: <alpine.OSX.2.20.1602010750380.1003@mjmartin-mac01.local>

On Mon, 2016-02-01 at 08:01 -0800, Mat Martineau wrote:
> Rodrigo and Daniel -
> 
> On Thu, 28 Jan 2016, Vivi, Rodrigo wrote:
> 
> > 
> > Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > 
> > I've checked with DMC folks that DMC 1.23 that we are currently 
> > using
> > and the following releases support J0 and K0.
> > 
> > With this patch we are covering all SKL steppings we know so far, 
> > but
> > besides being concern with new steppings appearing at any moment 
> > I'm
> > mostly concerned about KBL where I just saw a KBL revid=8 and we 
> > were
> > considering revid=0 as KBL H0. So I'm asking myself if we do have
> > better ways of handling this and preferably killing this table.
> > 
> > In case someone have a good idea please let me know.
> > 
> > But for now we need to move fast with this patch.
> 
> 
> Is this patch ready to merge?

I just merged to -dinq. 

Thanks,
Rodrigo.

> 
> Thanks,
> Mat
> 
> 
> > On Thu, 2016-01-28 at 15:19 -0800, Mat Martineau wrote:
> > > The driver does not load firmware for unknown steppings, so these 
> > > new
> > > steppings must be added to the list.
> > > 
> > > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > > Signed-off-by: Mat Martineau <mathew.j.martineau@linux.intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_csr.c | 3 ++-
> > >  1 file changed, 2 insertions(+), 1 deletion(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_csr.c
> > > b/drivers/gpu/drm/i915/intel_csr.c
> > > index 9bb63a8..450bab7 100644
> > > --- a/drivers/gpu/drm/i915/intel_csr.c
> > > +++ b/drivers/gpu/drm/i915/intel_csr.c
> > > @@ -177,7 +177,8 @@ static const struct stepping_info
> > > kbl_stepping_info[] = {
> > >  static const struct stepping_info skl_stepping_info[] = {
> > >  	{'A', '0'}, {'B', '0'}, {'C', '0'},
> > >  	{'D', '0'}, {'E', '0'}, {'F', '0'},
> > > -	{'G', '0'}, {'H', '0'}, {'I', '0'}
> > > +	{'G', '0'}, {'H', '0'}, {'I', '0'},
> > > +	{'J', '0'}, {'K', '0'}
> > >  };
> > > 
> > >  static const struct stepping_info bxt_stepping_info[] = {
> 
> --
> Mat Martineau
> Intel OTC
> 
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  reply	other threads:[~2016-02-01 17:01 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-01-28 23:19 [PATCH] drm/i915/skl: Fix DMC load on Skylake J0 and K0 Mat Martineau
2016-01-28 23:26 ` Vivi, Rodrigo
2016-02-01 16:01   ` Mat Martineau
2016-02-01 17:00     ` Vivi, Rodrigo [this message]
2016-01-29 11:30 ` ✗ Fi.CI.BAT: failure for " Patchwork

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