* [PATCH] drm/i915: implement WaIncreaseDefaultTLBEntries
@ 2016-02-04 11:49 tim.gore
2016-02-04 13:09 ` ✓ Fi.CI.BAT: success for " Patchwork
0 siblings, 1 reply; 3+ messages in thread
From: tim.gore @ 2016-02-04 11:49 UTC (permalink / raw)
To: intel-gfx; +Cc: mika.kuoppala
From: Tim Gore <tim.gore@intel.com>
WaIncreaseDefaultTLBEntries increases the number of TLB
entries available for GPGPU workloads and gives significant
( > 10% ) performance gain for some OCL benchmarks.
Put this in a new function that can be a place for
workarounds that are GT related but not required per ring.
This function is called on driver load and also after a
reset and on resume, so it is safe for workarounds that get
clobbered in these situations. This function currently has
just this one workaround.
v2: This was originally split into 3 patches but following
review feedback was squashed into 1.
I have not incorporated some style comments from Chris
Wilson as I felt that after defining and intialising a
temporary variable and then adding an additional if block
to only write the register if the temporary variable had
been set, this didn't really give a net gain.
v3: Resending in the hope that BAT will run
v4: Change subject line to trigger BAT (please!)
Signed-off-by: Tim Gore <tim.gore@intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 21 +++++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 7 +++++++
2 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 7377b67..5cd5f8b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2132,6 +2132,25 @@ static void i915_address_space_init(struct i915_address_space *vm,
list_add_tail(&vm->global_link, &dev_priv->vm_list);
}
+static void gtt_write_workarounds(struct drm_device *dev)
+{
+ struct drm_i915_private *dev_priv = dev->dev_private;
+
+ /* This function is for gtt related workarounds. This function is
+ * called on driver load and after a GPU reset, so you can place
+ * workarounds here even if they get overwritten by GPU reset.
+ */
+ /* WaIncreaseDefaultTLBEntries:chv,bdw,skl,bxt */
+ if (IS_BROADWELL(dev))
+ I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW);
+ else if (IS_CHERRYVIEW(dev))
+ I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV);
+ else if (IS_SKYLAKE(dev))
+ I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL);
+ else if (IS_BROXTON(dev))
+ I915_WRITE(GEN8_L3_LRA_1_GPGPU, GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT);
+}
+
int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
{
struct drm_i915_private *dev_priv = dev->dev_private;
@@ -2148,6 +2167,8 @@ int i915_ppgtt_init(struct drm_device *dev, struct i915_hw_ppgtt *ppgtt)
int i915_ppgtt_init_hw(struct drm_device *dev)
{
+ gtt_write_workarounds(dev);
+
/* In the case of execlists, PPGTT is enabled by the context descriptor
* and the PDPs are contained within the context itself. We don't
* need to do anything here. */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 65e32a3..0ab6312 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -8170,4 +8170,11 @@ enum skl_disp_power_wells {
#define GEN9_VEBOX_MOCS(i) _MMIO(0xcb00 + (i) * 4) /* Video MOCS registers */
#define GEN9_BLT_MOCS(i) _MMIO(0xcc00 + (i) * 4) /* Blitter MOCS registers */
+/* gamt regs */
+#define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4)
+#define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW 0x67F1427F /* max/min for LRA1/2 */
+#define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_CHV 0x5FF101FF /* max/min for LRA1/2 */
+#define GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_SKL 0x67F1427F /* " " */
+#define GEN9_L3_LRA_1_GPGPU_DEFAULT_VALUE_BXT 0x5FF101FF /* " " */
+
#endif /* _I915_REG_H_ */
--
1.9.1
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^ permalink raw reply related [flat|nested] 3+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: implement WaIncreaseDefaultTLBEntries
2016-02-04 11:49 [PATCH] drm/i915: implement WaIncreaseDefaultTLBEntries tim.gore
@ 2016-02-04 13:09 ` Patchwork
2016-02-04 14:25 ` Tvrtko Ursulin
0 siblings, 1 reply; 3+ messages in thread
From: Patchwork @ 2016-02-04 13:09 UTC (permalink / raw)
To: tim.gore; +Cc: intel-gfx
== Summary ==
Series 3077v1 drm/i915: implement WaIncreaseDefaultTLBEntries
http://patchwork.freedesktop.org/api/1.0/series/3077/revisions/1/mbox/
Test gem_sync:
Subgroup basic-blt:
incomplete -> PASS (skl-i5k-2)
bdw-nuci7 total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9
bdw-ultra total:164 pass:152 dwarn:0 dfail:0 fail:0 skip:12
byt-nuc total:164 pass:141 dwarn:0 dfail:0 fail:0 skip:23
hsw-brixbox total:164 pass:151 dwarn:0 dfail:0 fail:0 skip:13
hsw-gt2 total:164 pass:154 dwarn:0 dfail:0 fail:0 skip:10
ilk-hp8440p total:164 pass:116 dwarn:0 dfail:0 fail:0 skip:48
ivb-t430s total:164 pass:150 dwarn:0 dfail:0 fail:0 skip:14
skl-i5k-2 total:164 pass:149 dwarn:1 dfail:0 fail:0 skip:14
skl-i7k-2 total:164 pass:149 dwarn:1 dfail:0 fail:0 skip:14
snb-dellxps total:164 pass:142 dwarn:0 dfail:0 fail:0 skip:22
snb-x220t total:164 pass:142 dwarn:0 dfail:0 fail:1 skip:21
Results at /archive/results/CI_IGT_test/Patchwork_1364/
82b0b8e5fd2d7b63877c91cbe45138efbc46114e drm-intel-nightly: 2016y-02m-04d-11h-00m-00s UTC integration manifest
d6a44d13ce71c2a8dcbaaa6e38fcd06b634d2b50 drm/i915: implement WaIncreaseDefaultTLBEntries
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^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: ✓ Fi.CI.BAT: success for drm/i915: implement WaIncreaseDefaultTLBEntries
2016-02-04 13:09 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2016-02-04 14:25 ` Tvrtko Ursulin
0 siblings, 0 replies; 3+ messages in thread
From: Tvrtko Ursulin @ 2016-02-04 14:25 UTC (permalink / raw)
To: intel-gfx, tim.gore
On 04/02/16 13:09, Patchwork wrote:
> == Summary ==
>
> Series 3077v1 drm/i915: implement WaIncreaseDefaultTLBEntries
> http://patchwork.freedesktop.org/api/1.0/series/3077/revisions/1/mbox/
>
> Test gem_sync:
> Subgroup basic-blt:
> incomplete -> PASS (skl-i5k-2)
>
> bdw-nuci7 total:161 pass:152 dwarn:0 dfail:0 fail:0 skip:9
> bdw-ultra total:164 pass:152 dwarn:0 dfail:0 fail:0 skip:12
> byt-nuc total:164 pass:141 dwarn:0 dfail:0 fail:0 skip:23
> hsw-brixbox total:164 pass:151 dwarn:0 dfail:0 fail:0 skip:13
> hsw-gt2 total:164 pass:154 dwarn:0 dfail:0 fail:0 skip:10
> ilk-hp8440p total:164 pass:116 dwarn:0 dfail:0 fail:0 skip:48
> ivb-t430s total:164 pass:150 dwarn:0 dfail:0 fail:0 skip:14
> skl-i5k-2 total:164 pass:149 dwarn:1 dfail:0 fail:0 skip:14
> skl-i7k-2 total:164 pass:149 dwarn:1 dfail:0 fail:0 skip:14
> snb-dellxps total:164 pass:142 dwarn:0 dfail:0 fail:0 skip:22
> snb-x220t total:164 pass:142 dwarn:0 dfail:0 fail:1 skip:21
>
> Results at /archive/results/CI_IGT_test/Patchwork_1364/
>
> 82b0b8e5fd2d7b63877c91cbe45138efbc46114e drm-intel-nightly: 2016y-02m-04d-11h-00m-00s UTC integration manifest
> d6a44d13ce71c2a8dcbaaa6e38fcd06b634d2b50 drm/i915: implement WaIncreaseDefaultTLBEntries
Patch merged.
Regards,
Tvrtko
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