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From: sourab.gupta@intel.com
To: intel-gfx@lists.freedesktop.org
Cc: Jabin Wu <jabin.wu@intel.com>, Sourab Gupta <sourab.gupta@intel.com>
Subject: [PATCH 03/11] drm/i915: return ctx->global_id from intel_execlists_ctx_id()
Date: Tue, 16 Feb 2016 10:57:11 +0530	[thread overview]
Message-ID: <1455600439-18480-4-git-send-email-sourab.gupta@intel.com> (raw)
In-Reply-To: <1455600439-18480-1-git-send-email-sourab.gupta@intel.com>

From: Robert Bragg <robert@sixbynine.org>

The newly added intel_context::global_id is suitable (a globally unique
20 bit ID) for giving to the hardware as a unique context identifier.

Compared to using the pinned address of a logical ring context these IDs
are constant for the lifetime of a context whereas a context could be
repinned at different addresses during its lifetime.

Having a stable ID is useful when we need to buffer information
associated with a context based on this ID so the association can't be
lost. For example the OA unit writes out counter reports to a circular
buffer tagged with this ID and we want to be able to accurately filter
reports for a specific context, ideally without the added complexity of
tracking context re-pinning while the OA buffer may contain reports with
older IDs.

Cc: Sourab Gupta <sourab.gupta@intel.com>
Signed-off-by: Robert Bragg <robert@sixbynine.org>
---
 drivers/gpu/drm/i915/i915_debugfs.c |  7 ++++---
 drivers/gpu/drm/i915/intel_lrc.c    | 22 ++++++++++------------
 drivers/gpu/drm/i915/intel_lrc.h    |  2 +-
 3 files changed, 15 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 8aab974..ff4a6fe 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1970,6 +1970,7 @@ static int i915_context_status(struct seq_file *m, void *unused)
 
 static void i915_dump_lrc_obj(struct seq_file *m,
 			      struct intel_engine_cs *ring,
+			      struct intel_context *ctx,
 			      struct drm_i915_gem_object *ctx_obj)
 {
 	struct page *page;
@@ -1984,7 +1985,7 @@ static void i915_dump_lrc_obj(struct seq_file *m,
 	}
 
 	seq_printf(m, "CONTEXT: %s %u\n", ring->name,
-		   intel_execlists_ctx_id(ctx_obj));
+		   intel_execlists_ctx_id(ctx));
 
 	if (!i915_gem_obj_ggtt_bound(ctx_obj))
 		seq_puts(m, "\tNot bound in GGTT\n");
@@ -2033,7 +2034,7 @@ static int i915_dump_lrc(struct seq_file *m, void *unused)
 	list_for_each_entry(ctx, &dev_priv->context_list, link) {
 		for_each_ring(ring, dev_priv, i) {
 			if (ring->default_context != ctx)
-				i915_dump_lrc_obj(m, ring,
+				i915_dump_lrc_obj(m, ring, ctx,
 						  ctx->engine[i].state);
 		}
 	}
@@ -2112,7 +2113,7 @@ static int i915_execlists(struct seq_file *m, void *data)
 
 			ctx_obj = head_req->ctx->engine[ring_id].state;
 			seq_printf(m, "\tHead request id: %u\n",
-				   intel_execlists_ctx_id(ctx_obj));
+				   intel_execlists_ctx_id(head_req->ctx));
 			seq_printf(m, "\tHead request tail: %u\n",
 				   head_req->tail);
 		}
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 40bda8d..4789555 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -260,7 +260,7 @@ int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists
 
 /**
  * intel_execlists_ctx_id() - get the Execlists Context ID
- * @ctx_obj: Logical Ring Context backing object.
+ * @ctx: LR context
  *
  * Do not confuse with ctx->id! Unfortunately we have a name overload
  * here: the old context ID we pass to userspace as a handler so that
@@ -269,15 +269,15 @@ int intel_sanitize_enable_execlists(struct drm_device *dev, int enable_execlists
  * interrupts.
  *
  * Return: 20-bits globally unique context ID.
+ *
+ * Further the ID given to HW can now be relied on to be constant for
+ * the lifetime of the context, unlike previously when we used an
+ * associated logical ring context address (which could be repinned at
+ * a different address).
  */
-u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj)
+u32 intel_execlists_ctx_id(struct intel_context *ctx)
 {
-	u32 lrca = i915_gem_obj_ggtt_offset(ctx_obj) +
-			LRC_PPHWSP_PN * PAGE_SIZE;
-
-	/* LRCA is required to be 4K aligned so the more significant 20 bits
-	 * are globally unique */
-	return lrca >> 12;
+	return ctx->global_id;
 }
 
 static bool disable_lite_restore_wa(struct intel_engine_cs *ring)
@@ -305,7 +305,7 @@ uint64_t intel_lr_context_descriptor(struct intel_context *ctx,
 		desc |= GEN8_CTX_L3LLC_COHERENT;
 	desc |= GEN8_CTX_PRIVILEGE;
 	desc |= lrca;
-	desc |= (u64)intel_execlists_ctx_id(ctx_obj) << GEN8_CTX_ID_SHIFT;
+	desc |= (u64)intel_execlists_ctx_id(ctx) << GEN8_CTX_ID_SHIFT;
 
 	/* TODO: WaDisableLiteRestore when we start using semaphore
 	 * signalling between Command Streamers */
@@ -475,9 +475,7 @@ static bool execlists_check_remove_request(struct intel_engine_cs *ring,
 					    execlist_link);
 
 	if (head_req != NULL) {
-		struct drm_i915_gem_object *ctx_obj =
-				head_req->ctx->engine[ring->id].state;
-		if (intel_execlists_ctx_id(ctx_obj) == request_id) {
+		if (intel_execlists_ctx_id(head_req->ctx) == request_id) {
 			WARN(head_req->elsp_submitted == 0,
 			     "Never submitted head request\n");
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.h b/drivers/gpu/drm/i915/intel_lrc.h
index 4e60d54..1b08cd2 100644
--- a/drivers/gpu/drm/i915/intel_lrc.h
+++ b/drivers/gpu/drm/i915/intel_lrc.h
@@ -93,7 +93,7 @@ struct i915_execbuffer_params;
 int intel_execlists_submission(struct i915_execbuffer_params *params,
 			       struct drm_i915_gem_execbuffer2 *args,
 			       struct list_head *vmas);
-u32 intel_execlists_ctx_id(struct drm_i915_gem_object *ctx_obj);
+u32 intel_execlists_ctx_id(struct intel_context *ctx);
 
 void intel_lrc_irq_handler(struct intel_engine_cs *ring);
 void intel_execlists_retire_requests(struct intel_engine_cs *ring);
-- 
1.9.1

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  parent reply	other threads:[~2016-02-16  5:25 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-16  5:27 [PATCH 00/11] Framework to collect gpu metrics using i915 perf infrastructure sourab.gupta
2016-02-16  5:27 ` [PATCH 01/11] drm/i915: Introduce global id for contexts sourab.gupta
2016-02-16  5:27 ` [PATCH 02/11] drm/i915: Constrain intel_context::global_id to 20 bits sourab.gupta
2016-02-16  5:27 ` sourab.gupta [this message]
2016-02-16  9:34   ` [PATCH 03/11] drm/i915: return ctx->global_id from intel_execlists_ctx_id() Dave Gordon
2016-02-16  5:27 ` [PATCH 04/11] drm/i915: Add ctx getparam ioctl parameter to retrieve ctx global id sourab.gupta
2016-02-16  5:27 ` [PATCH 05/11] drm/i915: Expose OA sample source to userspace sourab.gupta
2016-02-16  5:27 ` [PATCH 06/11] drm/i915: Framework for capturing command stream based OA reports sourab.gupta
2016-02-17 17:30   ` Robert Bragg
2016-02-19  6:51     ` sourab gupta
2016-02-16  5:27 ` [PATCH 07/11] drm/i915: Add support for having pid output with OA report sourab.gupta
2016-02-16  5:27 ` [PATCH 08/11] drm/i915: Add support to add execbuffer tags to OA counter reports sourab.gupta
2016-02-16  5:27 ` [PATCH 09/11] drm/i915: Extend i915 perf framework for collecting timestamps on all gpu engines sourab.gupta
2016-02-16  5:27 ` [PATCH 10/11] drm/i915: Support opening multiple concurrent perf streams sourab.gupta
2016-02-16  5:27 ` [PATCH 11/11] drm/i915: Support for capturing MMIO register values sourab.gupta

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