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From: Zhi Wang <zhi.a.wang@intel.com>
To: intel-gfx@lists.freedesktop.org, igvt-g@lists.01.org
Cc: daniel.vetter@ffwll.ch, david.j.cowperthwaite@intel.com,
	zhiyuan.lv@intel.com
Subject: [RFCv2 14/14] drm/i915: Introduce GVT context creation API
Date: Thu, 18 Feb 2016 19:42:21 +0800	[thread overview]
Message-ID: <1455795741-3487-15-git-send-email-zhi.a.wang@intel.com> (raw)
In-Reply-To: <1455795741-3487-1-git-send-email-zhi.a.wang@intel.com>

GVT workload scheduler needs special host LRC contexts, the so called
"shadow LRC context" to submit guest workload to host i915. During the
guest workload submission, GVT fills the shadow LRC context with the
content of guest LRC context: engine context is copied without changes,
ring context is mostly owned by host i915.

The GVT-g workload scheduler flow:

         +-----------+                   +-----------+
         | GVT Guest |                   | GVT Guest |
         +-+-----^---+                   +-+-----^---+
           |     |                         |     |
           |     | GVT-g                   |     | GVT-g
vELSP write|     | emulates     vELSP write|     | emulates
           |     | Execlist/CSB            |     | Execlist/CSB
           |     | Status                  |     | Status
           |     |                         |     |
    +------v-----+-------------------------v-----+---------+
    |           GVT Virtual Execlist Submission            |
    +------+-------------------------------+---------------+
           |                               |
           | Per-VM/Ring Workoad Q         | Per-VM/Ring Workload Q
   +---------------------+--+      +------------------------+
       +---v--------+    ^             +---v--------+
       |GVT Workload|... |             |GVT Workload|...
       +------------+    |             +------------+
                         |
                         | Pick Workload from Q
    +--------------------+---------------------------------+
    |                GVT Workload Scheduler                |
    +--------------------+---------------------------------+
                         |         * Shadow guest LRC context
                  +------v------+  * Shadow guest ring buffer
                  | GVT Context |  * Scan/Patch guest RB instructions
                  +------+------+
                         |
                         v
              Host i915 GEM Submission

v2:

Mostly based on Daniel's idea. Call the refactored core logic of GEM
context creation service and LRC context creation service to create the GVT
context.

Signed-off-by: Zhi Wang <zhi.a.wang@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         |  1 +
 drivers/gpu/drm/i915/i915_gem_context.c | 52 +++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0850b35..fa31680 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3278,6 +3278,7 @@ i915_gem_context_get(struct drm_i915_file_private *file_priv, u32 id);
 void i915_gem_context_free(struct kref *ctx_ref);
 struct drm_i915_gem_object *
 i915_gem_alloc_context_obj(struct drm_device *dev, size_t size);
+struct intel_context *i915_gem_create_gvt_context(struct drm_device *dev);
 static inline void i915_gem_context_reference(struct intel_context *ctx)
 {
 	kref_get(&ctx->ref);
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index cda09f7..65f78c6 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -369,6 +369,58 @@ i915_gem_create_context(struct drm_device *dev,
 	return ctx;
 }
 
+/**
+ * i915_i915_gem_create_gvt_context - create a GVT GEM context
+ * @dev: drm device *
+ *
+ * This function is used to create a GVT specific GEM context.
+ *
+ * Returns:
+ * pointer to intel_context on success, NULL if failed
+ *
+ */
+struct intel_context *
+i915_gem_create_gvt_context(struct drm_device *dev)
+{
+	struct drm_i915_private *dev_priv = to_i915(dev);
+	struct i915_gem_context_create_params params;
+	struct intel_lr_context_alloc_params alloc_params;
+	struct intel_context *ctx;
+	int i, ret;
+
+	memset(&params, 0, sizeof(params));
+	memset(&alloc_params, 0, sizeof(params));
+
+	params.file_priv = NULL;
+	params.has_legacy_ctx = false;
+	params.has_ppgtt = false;
+	params.is_default_ctx = false;
+
+	alloc_params.ctx_needs_init = false;
+	alloc_params.ctx_needs_status_change_notification = true;
+	alloc_params.ctx_needs_single_submission = true;
+	alloc_params.ringbuffer_size = 512 * PAGE_SIZE;
+
+	mutex_lock(&dev->struct_mutex);
+
+	ctx = __i915_gem_create_context(dev, &params);
+	if (IS_ERR(ctx))
+		return ctx;
+
+	for (i = 0; i < I915_NUM_RINGS; i++) {
+		alloc_params.ring = &dev_priv->ring[i];
+		ret = __intel_lr_context_deferred_alloc(ctx, &alloc_params);
+		if (ret) {
+			i915_gem_context_unreference(ctx);
+			ctx = NULL;
+			goto out;
+		}
+	}
+out:
+	mutex_unlock(&dev->struct_mutex);
+	return ctx;
+}
+
 static void i915_gem_context_unpin(struct intel_context *ctx,
 				   struct intel_engine_cs *engine)
 {
-- 
1.9.1

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  parent reply	other threads:[~2016-02-18 11:45 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-18 11:42 [RFCv2 PATCH 00/14] gvt: Hacking i915 for GVT context requirement Zhi Wang
2016-02-18 11:42 ` [RFCv2 01/14] drm/i915: factor out i915_pvinfo.h Zhi Wang
2016-02-22 13:23   ` Joonas Lahtinen
2016-02-23  2:40     ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 02/14] drm/i915/gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-02-23 12:42   ` Joonas Lahtinen
2016-02-24  7:45     ` Tian, Kevin
2016-02-25 11:24       ` Joonas Lahtinen
2016-02-26  5:58     ` Zhi Wang
2016-02-23 12:53   ` Joonas Lahtinen
2016-02-24  7:50     ` Tian, Kevin
2016-02-24  8:08   ` Tian, Kevin
2016-02-26  5:38     ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 03/14] drm/i915: Introduce host graphics memory/fence partition for GVT-g Zhi Wang
2016-02-23 13:16   ` Joonas Lahtinen
2016-02-23 13:23     ` Zhi Wang
2016-02-24  7:42       ` Tian, Kevin
2016-02-25 13:13         ` Joonas Lahtinen
2016-02-26  5:21         ` Zhi Wang
2016-02-26 13:54           ` Joonas Lahtinen
2016-02-23 13:26     ` Joonas Lahtinen
2016-02-24  8:22   ` Tian, Kevin
2016-02-26  5:29     ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 04/14] drm/i915: factor out alloc_context_idr() and __i915_gem_create_context() Zhi Wang
2016-02-24  8:27   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 05/14] drm/i915: factor out __create_legacy_hw_context() Zhi Wang
2016-02-18 11:42 ` [RFCv2 06/14] drm/i915: let __i915_gem_context_create() takes context creation params Zhi Wang
2016-02-24  8:35   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 07/14] drm/i915: factor out __intel_lr_context_deferred_alloc() Zhi Wang
2016-02-24  8:37   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 08/14] drm/i915: Support per-PPGTT address space mode Zhi Wang
2016-02-24  8:47   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 09/14] drm/i915: generate address mode bit from PPGTT instance Zhi Wang
2016-02-18 11:42 ` [RFCv2 10/14] drm/i915: update PDPs by condition when submit the LRC context Zhi Wang
2016-02-24  8:49   ` Tian, Kevin
2016-02-25 15:02     ` Wang, Zhi A
2016-02-26 13:49       ` Joonas Lahtinen
2016-02-18 11:42 ` [RFCv2 11/14] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-02-18 11:42 ` [RFCv2 12/14] drm/i915: factor out execlists_i915_pick_requests() Zhi Wang
2016-02-18 11:42 ` [RFCv2 13/14] drm/i915: Support context single submission when GVT is active Zhi Wang
2016-02-24  8:52   ` Tian, Kevin
2016-02-18 11:42 ` Zhi Wang [this message]
2016-02-18 12:02 ` ✗ Fi.CI.BAT: failure for gvt: Hacking i915 for GVT context requirement Patchwork
2016-02-24  8:55 ` [RFCv2 PATCH 00/14] " Tian, Kevin
2016-02-24  9:18   ` Wang, Zhi A
2016-02-24  9:38     ` Tian, Kevin

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