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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 3/4] drm/i915: Move pll power state to crtc power domains.
Date: Mon, 29 Feb 2016 13:52:22 +0100	[thread overview]
Message-ID: <1456750343-7893-4-git-send-email-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <1456750343-7893-1-git-send-email-maarten.lankhorst@linux.intel.com>

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 10 +++-------
 1 file changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 6e3b8a1f7dd3..6f2dd3192bac 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1912,8 +1912,6 @@ static void intel_enable_shared_dpll(struct intel_crtc *crtc)
 	}
 	WARN_ON(pll->on);
 
-	intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS);
-
 	DRM_DEBUG_KMS("enabling %s\n", pll->name);
 	pll->enable(dev_priv, pll);
 	pll->on = true;
@@ -1952,8 +1950,6 @@ static void intel_disable_shared_dpll(struct intel_crtc *crtc)
 	DRM_DEBUG_KMS("disabling %s\n", pll->name);
 	pll->disable(dev_priv, pll);
 	pll->on = false;
-
-	intel_display_power_put(dev_priv, POWER_DOMAIN_PLLS);
 }
 
 static void ironlake_enable_pch_transcoder(struct drm_i915_private *dev_priv,
@@ -5347,6 +5343,9 @@ static unsigned long get_crtc_power_domains(struct drm_crtc *crtc,
 		mask |= BIT(intel_display_port_power_domain(intel_encoder));
 	}
 
+	if (crtc_state->shared_dpll != DPLL_ID_PRIVATE)
+		mask |= BIT(POWER_DOMAIN_PLLS);
+
 	return mask;
 }
 
@@ -15775,9 +15774,6 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 
 		DRM_DEBUG_KMS("%s hw state readout: crtc_mask 0x%08x, on %i\n",
 			      pll->name, pll->config.crtc_mask, pll->on);
-
-		if (pll->config.crtc_mask)
-			intel_display_power_get(dev_priv, POWER_DOMAIN_PLLS);
 	}
 
 	for_each_intel_encoder(dev, encoder) {
-- 
2.1.0

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  parent reply	other threads:[~2016-02-29 12:52 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-29 12:52 [PATCH 0/4] Prepare dpll for async Maarten Lankhorst
2016-02-29 12:52 ` [PATCH 1/4] drm/i915: Use a crtc mask instead of a refcount for dpll functions Maarten Lankhorst
2016-03-01 16:52   ` R, Durgadoss
2016-03-04  9:09   ` Ander Conselvan De Oliveira
2016-02-29 12:52 ` [PATCH 2/4] drm/i915: Perform dpll commit first Maarten Lankhorst
2016-03-01 16:58   ` R, Durgadoss
2016-03-04  9:51   ` Ander Conselvan De Oliveira
2016-02-29 12:52 ` Maarten Lankhorst [this message]
2016-03-01 17:03   ` [PATCH 3/4] drm/i915: Move pll power state to crtc power domains R, Durgadoss
2016-03-04 15:14     ` Ander Conselvan De Oliveira
2016-03-04 15:16   ` Ander Conselvan De Oliveira
2016-02-29 12:52 ` [PATCH 4/4] drm/i915: Add locking to pll updates Maarten Lankhorst
2016-03-01 17:08   ` R, Durgadoss
2016-02-29 13:22 ` ✗ Fi.CI.BAT: failure for Prepare dpll for async Patchwork

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