[CABC PATCH 0/2] CABC patch list

[CABC PATCH 0/2] CABC patch list

[Deepak M]

CABC stands for the Content Adaptive Backlight Control.
In the normal display the backlight which we see is due to the
backlight which is being modulated by the filter, which is inturn
dependent on the image. In brief the CABC does the histogram
analysis of the image and then controls the filter and backlight.
For example in CABC to display the dark image the backlight is dimmed
and then controlls the filter to allow more light, because of
which is power consuption will be reduced.

Below are the initial set of patches which supports the CABC.
A field exists in the mipi configuration of the VBT which
when enabled indicates the CABC is supported. Depending on
this field the backlight control function pointer are
initialized in the intel_panel.c file.

In case of dual link panels depending on the panel
the DCS commands have to be send to either PORT A,
PORT C or both PORT A and PORT C. Again a field is
added in the VBT to get this data from the version 197 onwards.
One of the below patches parses these fields from the
VBT.

Addressed the review comments of Jani, which were mentioned in
the below
https://lists.freedesktop.org/archives/intel-gfx/2015-November/081233.html

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>


Deepak M (2):
  drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT
  drm/i915: CABC support for backlight control

 drivers/gpu/drm/i915/Makefile         |   1 +
 drivers/gpu/drm/i915/i915_drv.h       |   2 +-
 drivers/gpu/drm/i915/intel_bios.c     |  10 ++
 drivers/gpu/drm/i915/intel_bios.h     |   5 +-
 drivers/gpu/drm/i915/intel_dsi.c      |  17 +++-
 drivers/gpu/drm/i915/intel_dsi.h      |  13 +++
 drivers/gpu/drm/i915/intel_dsi_cabc.c | 179 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_panel.c    |   4 +
 8 files changed, 228 insertions(+), 3 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c

-- 
1.9.1

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[CABC PATCH 1/2] drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

[Deepak M]

For dual link panel scenarios there are new fileds added in the
VBT which indicate on which port the PWM cntrl and CABC ON/OFF
commands needs to be sent.

v2: Moving the comment to intel_dsi.h(Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/intel_bios.c | 10 ++++++++++
 drivers/gpu/drm/i915/intel_bios.h |  5 ++++-
 drivers/gpu/drm/i915/intel_dsi.h  |  9 +++++++++
 3 files changed, 23 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index bf62a19..4f5c0df 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -747,6 +747,16 @@ parse_mipi_config(struct drm_i915_private *dev_priv,
 		return;
 	}
 
+	/*
+	 * These fileds are introduced from the VBT version 197 onwards,
+	 * so making sure that these bits are set zero in the pervious
+	 * versions.
+	 */
+	if (dev_priv->vbt.dsi.config->dual_link && bdb->version < 197) {
+		dev_priv->vbt.dsi.config->dl_cabc_port = 0;
+		dev_priv->vbt.dsi.config->pwm_bkl_ctrl = 0;
+	}
+
 	/* We have mandatory mipi config blocks. Initialize as generic panel */
 	dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
 }
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index 350d4e0..8f295fd 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -846,7 +846,10 @@ struct mipi_config {
 	u16 dual_link:2;
 	u16 lane_cnt:2;
 	u16 pixel_overlap:3;
-	u16 rsvd3:9;
+	u16 rgb_flip:1;
+	u16 dl_cabc_port:2;
+	u16 pwm_bkl_ctrl:2;
+	u16 rsvd3:4;
 
 	u16 rsvd4;
 
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index de7be7f..6dfa0e3 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -74,6 +74,15 @@ struct intel_dsi {
 
 	u8 escape_clk_div;
 	u8 dual_link;
+
+	/*
+	 * Below field will inform us on which port the panel blk_cntrl
+	 * and CABC ON/OFF commands needs to be sent in case of dual link
+	 * panels
+	 */
+	u8 bkl_dcs_ports;
+	u8 pwm_blk_ctrl;
+
 	u8 pixel_overlap;
 	u32 port_bits;
 	u32 bw_timer;
-- 
1.9.1

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[CABC PATCH 2/2] drm/i915: CABC support for backlight control

[Deepak M]

In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.

The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion here assumes that the
panels use standard SW register for control.

In this design there will be no PWM signal from the SoC and DCS
commands are sent to enable and control the backlight brightness.

v2: Moving the CABC bkl functions to new file.(Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/Makefile         |   1 +
 drivers/gpu/drm/i915/i915_drv.h       |   2 +-
 drivers/gpu/drm/i915/intel_dsi.c      |  17 +++-
 drivers/gpu/drm/i915/intel_dsi.h      |   4 +
 drivers/gpu/drm/i915/intel_dsi_cabc.c | 179 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_panel.c    |   4 +
 6 files changed, 205 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 0851de07..2c69ed4 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -82,6 +82,7 @@ i915-y += dvo_ch7017.o \
 	  intel_dp.o \
 	  intel_dsi.o \
 	  intel_dsi_panel_vbt.o \
+	  intel_dsi_cabc.o \
 	  intel_dsi_pll.o \
 	  intel_dvo.o \
 	  intel_hdmi.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6644c2e..43dd10e 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3488,7 +3488,7 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
 		     enum intel_sbi_destination destination);
 u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
 void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-
+int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector);
 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
 
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index b928c50..caa65df 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1171,8 +1171,23 @@ void intel_dsi_init(struct drm_device *dev)
 		intel_dsi->ports = (1 << PORT_C);
 	}
 
-	if (dev_priv->vbt.dsi.config->dual_link)
+	if (dev_priv->vbt.dsi.config->dual_link) {
 		intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
+		switch (dev_priv->vbt.dsi.config->dl_cabc_port) {
+		case CABC_PORT_A:
+			intel_dsi->bkl_dcs_ports = (1 << PORT_A);
+			break;
+		case CABC_PORT_C:
+			intel_dsi->bkl_dcs_ports = (1 << PORT_C);
+			break;
+		case CABC_PORT_A_AND_C:
+			intel_dsi->bkl_dcs_ports = intel_dsi->ports;
+			break;
+		default:
+			DRM_ERROR("Unknown MIPI ports for sending DCS\n");
+		}
+	} else
+		intel_dsi->bkl_dcs_ports = intel_dsi->ports;
 
 	/* Create a DSI host (and a device) for each port. */
 	for_each_dsi_port(port, intel_dsi->ports) {
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 6dfa0e3..466da2d 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -34,6 +34,10 @@
 #define DSI_DUAL_LINK_FRONT_BACK	1
 #define DSI_DUAL_LINK_PIXEL_ALT		2
 
+#define CABC_PORT_A                     0x00
+#define CABC_PORT_C                     0x01
+#define CABC_PORT_A_AND_C               0x02
+
 struct intel_dsi_host;
 
 struct intel_dsi {
diff --git a/drivers/gpu/drm/i915/intel_dsi_cabc.c b/drivers/gpu/drm/i915/intel_dsi_cabc.c
new file mode 100644
index 0000000..d14a669
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dsi_cabc.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright © 2006-2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Deepak M <m.deepak at intel.com>
+ */
+
+#include "intel_drv.h"
+#include "intel_dsi.h"
+#include "i915_drv.h"
+#include <drm/drm_mipi_dsi.h>
+
+#define CABC_OFF                        (0 << 0)
+#define CABC_USER_INTERFACE_IMAGE       (1 << 0)
+#define CABC_STILL_PICTURE              (2 << 0)
+#define CABC_VIDEO_MODE                 (3 << 0)
+
+#define CABC_BACKLIGHT                  (1 << 2)
+#define CABC_DIMMING_DISPLAY            (1 << 3)
+#define CABC_BCTRL                      (1 << 5)
+
+#define CABC_MAX_VALUE                  0xFF
+
+#define MIPI_DCS_CABC_LEVEL_RD          0x52
+#define MIPI_DCS_CABC_MIN_BRIGHTNESS_RD 0x5F
+#define MIPI_DCS_CABC_CONTROL_RD        0x56
+#define MIPI_DCS_CABC_CONTROL_BRIGHT_RD 0x54
+#define MIPI_DCS_CABC_LEVEL_WR          0x51
+#define MIPI_DCS_CABC_MIN_BRIGHTNESS_WR 0x5E
+#define MIPI_DCS_CABC_CONTROL_WR        0x55
+#define MIPI_DCS_CABC_CONTROL_BRIGHT_WR 0x53
+
+static u32 cabc_get_backlight(struct intel_connector *connector)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct mipi_dsi_device *dsi_device;
+	u8 data[2] = {0};
+	enum port port;
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		mipi_dsi_dcs_read(dsi_device, MIPI_DCS_CABC_LEVEL_RD, data, 2);
+	}
+
+	return data[1];
+}
+
+static void cabc_set_backlight(struct intel_connector *connector, u32 level)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct mipi_dsi_device *dsi_device;
+	u8 data[2] = {0};
+	enum port port;
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data[1] = level;
+		data[0] = MIPI_DCS_CABC_LEVEL_WR;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+	}
+}
+
+static void cabc_disable_backlight(struct intel_connector *connector)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct mipi_dsi_device *dsi_device;
+	enum port port;
+	u8 data[2] = {0};
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	cabc_set_backlight(connector, 0);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data[1] = CABC_OFF;
+		data[0] = MIPI_DCS_CABC_CONTROL_WR;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+	}
+}
+
+static void cabc_enable_backlight(struct intel_connector *connector)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct intel_panel *panel = &connector->panel;
+	struct mipi_dsi_device *dsi_device;
+	enum port port;
+	u8 data[2] = {0};
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
+		data[1] = CABC_BACKLIGHT | CABC_DIMMING_DISPLAY | CABC_BCTRL;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+		data[0] = MIPI_DCS_CABC_CONTROL_WR;
+		data[1] = CABC_STILL_PICTURE;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+	}
+
+	cabc_set_backlight(connector, panel->backlight.level);
+}
+
+static int cabc_setup_backlight(struct intel_connector *connector,
+		enum pipe unused)
+{
+	struct drm_device *dev = connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_panel *panel = &connector->panel;
+
+	if (dev_priv->vbt.backlight.present)
+		panel->backlight.present = true;
+	else {
+		DRM_ERROR("no backlight present per VBT\n");
+		return 0;
+	}
+
+	panel->backlight.max = CABC_MAX_VALUE;
+	panel->backlight.level = CABC_MAX_VALUE;
+
+	return 0;
+}
+
+int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector)
+{
+	struct drm_device *dev = intel_connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_encoder *encoder = intel_connector->encoder;
+	struct intel_panel *panel = &intel_connector->panel;
+
+	if (!dev_priv->vbt.dsi.config->cabc_supported)
+		return -EINVAL;
+
+	if (encoder->type != INTEL_OUTPUT_DSI) {
+		DRM_ERROR("Use DSI encoder for CABC\n");
+		return -EINVAL;
+	}
+
+	panel->backlight.setup = cabc_setup_backlight;
+	panel->backlight.enable = cabc_enable_backlight;
+	panel->backlight.disable = cabc_disable_backlight;
+	panel->backlight.set = cabc_set_backlight;
+	panel->backlight.get = cabc_get_backlight;
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 21ee647..f29a8f2 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1720,6 +1720,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
 		container_of(panel, struct intel_connector, panel);
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 
+	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
+			intel_dsi_cabc_init_backlight_funcs(connector) == 0)
+		return;
+
 	if (IS_BROXTON(dev_priv)) {
 		panel->backlight.setup = bxt_setup_backlight;
 		panel->backlight.enable = bxt_enable_backlight;
-- 
1.9.1

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✗ Fi.CI.BAT: failure for CABC patch list (rev2)

[Patchwork]

== Series Details ==

Series: CABC patch list (rev2)
URL   : https://patchwork.freedesktop.org/series/801/
State : failure

== Summary ==

Series 801v2 CABC patch list
2016-03-08T08:11:48.046116 http://patchwork.freedesktop.org/api/1.0/series/801/revisions/2/mbox/
Applying: drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT
Applying: drm/i915: CABC support for backlight control
Repository lacks necessary blobs to fall back on 3-way merge.
Cannot fall back to three-way merge.
Patch failed at 0002 drm/i915: CABC support for backlight control

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Re: [CABC PATCH 2/2] drm/i915: CABC support for backlight control

[Adebisi, YetundeX]

This patch no longer applies.

> -----Original Message-----
> From: Deepak, M
> Sent: Tuesday, March 08, 2016 8:34 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Deepak, M; Nikula, Jani; Vetter, Daniel; Adebisi, YetundeX
> Subject: [CABC PATCH 2/2] drm/i915: CABC support for backlight control
> 
> In CABC (Content Adaptive Brightness Control) content grey level
> scale can be increased while simultaneously decreasing
> brightness of the backlight to achieve same perceived brightness.
> 
> The CABC is not standardized and panel vendors are free to follow
> their implementation. The CABC implementaion here assumes that the
> panels use standard SW register for control.
> 
> In this design there will be no PWM signal from the SoC and DCS
> commands are sent to enable and control the backlight brightness.
> 
> v2: Moving the CABC bkl functions to new file.(Jani)
> 
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile         |   1 +
>  drivers/gpu/drm/i915/i915_drv.h       |   2 +-
>  drivers/gpu/drm/i915/intel_dsi.c      |  17 +++-
>  drivers/gpu/drm/i915/intel_dsi.h      |   4 +
>  drivers/gpu/drm/i915/intel_dsi_cabc.c | 179
> ++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_panel.c    |   4 +
>  6 files changed, 205 insertions(+), 2 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c
> 
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 0851de07..2c69ed4 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -82,6 +82,7 @@ i915-y += dvo_ch7017.o \
>  	  intel_dp.o \
>  	  intel_dsi.o \
>  	  intel_dsi_panel_vbt.o \
> +	  intel_dsi_cabc.o \
>  	  intel_dsi_pll.o \
>  	  intel_dvo.o \
>  	  intel_hdmi.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index 6644c2e..43dd10e 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3488,7 +3488,7 @@ void intel_sbi_write(struct drm_i915_private
> *dev_priv, u16 reg, u32 value,
>  		     enum intel_sbi_destination destination);
>  u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
>  void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
> -
> +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector
> *intel_connector);
>  int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
>  int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
> 
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c
> b/drivers/gpu/drm/i915/intel_dsi.c
> index b928c50..caa65df 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -1171,8 +1171,23 @@ void intel_dsi_init(struct drm_device *dev)
>  		intel_dsi->ports = (1 << PORT_C);
>  	}
> 
> -	if (dev_priv->vbt.dsi.config->dual_link)
> +	if (dev_priv->vbt.dsi.config->dual_link) {
>  		intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
> +		switch (dev_priv->vbt.dsi.config->dl_cabc_port) {
> +		case CABC_PORT_A:
> +			intel_dsi->bkl_dcs_ports = (1 << PORT_A);
> +			break;
> +		case CABC_PORT_C:
> +			intel_dsi->bkl_dcs_ports = (1 << PORT_C);
> +			break;
> +		case CABC_PORT_A_AND_C:
> +			intel_dsi->bkl_dcs_ports = intel_dsi->ports;
> +			break;
> +		default:
> +			DRM_ERROR("Unknown MIPI ports for sending
> DCS\n");
> +		}
> +	} else
> +		intel_dsi->bkl_dcs_ports = intel_dsi->ports;
> 
>  	/* Create a DSI host (and a device) for each port. */
>  	for_each_dsi_port(port, intel_dsi->ports) {
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h
> b/drivers/gpu/drm/i915/intel_dsi.h
> index 6dfa0e3..466da2d 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -34,6 +34,10 @@
>  #define DSI_DUAL_LINK_FRONT_BACK	1
>  #define DSI_DUAL_LINK_PIXEL_ALT		2
> 
> +#define CABC_PORT_A                     0x00
> +#define CABC_PORT_C                     0x01
> +#define CABC_PORT_A_AND_C               0x02
> +
>  struct intel_dsi_host;
> 
>  struct intel_dsi {
> diff --git a/drivers/gpu/drm/i915/intel_dsi_cabc.c
> b/drivers/gpu/drm/i915/intel_dsi_cabc.c
> new file mode 100644
> index 0000000..d14a669
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_dsi_cabc.c
> @@ -0,0 +1,179 @@
> +/*
> + * Copyright © 2006-2010 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
> "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO
> EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
> DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> OTHER
> + * DEALINGS IN THE SOFTWARE.
> + *
> + * Author: Deepak M <m.deepak at intel.com>
> + */
> +
> +#include "intel_drv.h"
> +#include "intel_dsi.h"
> +#include "i915_drv.h"
> +#include <drm/drm_mipi_dsi.h>
> +
> +#define CABC_OFF                        (0 << 0)
> +#define CABC_USER_INTERFACE_IMAGE       (1 << 0)
> +#define CABC_STILL_PICTURE              (2 << 0)
> +#define CABC_VIDEO_MODE                 (3 << 0)
> +
> +#define CABC_BACKLIGHT                  (1 << 2)
> +#define CABC_DIMMING_DISPLAY            (1 << 3)
> +#define CABC_BCTRL                      (1 << 5)
> +
> +#define CABC_MAX_VALUE                  0xFF
> +
> +#define MIPI_DCS_CABC_LEVEL_RD          0x52
> +#define MIPI_DCS_CABC_MIN_BRIGHTNESS_RD 0x5F
> +#define MIPI_DCS_CABC_CONTROL_RD        0x56
> +#define MIPI_DCS_CABC_CONTROL_BRIGHT_RD 0x54
> +#define MIPI_DCS_CABC_LEVEL_WR          0x51
> +#define MIPI_DCS_CABC_MIN_BRIGHTNESS_WR 0x5E
> +#define MIPI_DCS_CABC_CONTROL_WR        0x55
> +#define MIPI_DCS_CABC_CONTROL_BRIGHT_WR 0x53
> +
> +static u32 cabc_get_backlight(struct intel_connector *connector)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct mipi_dsi_device *dsi_device;
> +	u8 data[2] = {0};
> +	enum port port;
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		mipi_dsi_dcs_read(dsi_device, MIPI_DCS_CABC_LEVEL_RD,
> data, 2);
> +	}
> +
> +	return data[1];
> +}
> +
> +static void cabc_set_backlight(struct intel_connector *connector, u32 level)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct mipi_dsi_device *dsi_device;
> +	u8 data[2] = {0};
> +	enum port port;
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		data[1] = level;
> +		data[0] = MIPI_DCS_CABC_LEVEL_WR;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +	}
> +}
> +
> +static void cabc_disable_backlight(struct intel_connector *connector)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct mipi_dsi_device *dsi_device;
> +	enum port port;
> +	u8 data[2] = {0};
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	cabc_set_backlight(connector, 0);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		data[1] = CABC_OFF;
> +		data[0] = MIPI_DCS_CABC_CONTROL_WR;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +	}
> +}
> +
> +static void cabc_enable_backlight(struct intel_connector *connector)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct intel_panel *panel = &connector->panel;
> +	struct mipi_dsi_device *dsi_device;
> +	enum port port;
> +	u8 data[2] = {0};
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
> +		data[1] = CABC_BACKLIGHT | CABC_DIMMING_DISPLAY |
> CABC_BCTRL;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +		data[0] = MIPI_DCS_CABC_CONTROL_WR;
> +		data[1] = CABC_STILL_PICTURE;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +	}
> +
> +	cabc_set_backlight(connector, panel->backlight.level);
> +}
> +
> +static int cabc_setup_backlight(struct intel_connector *connector,
> +		enum pipe unused)
> +{
> +	struct drm_device *dev = connector->base.dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_panel *panel = &connector->panel;
> +
> +	if (dev_priv->vbt.backlight.present)
> +		panel->backlight.present = true;
> +	else {
> +		DRM_ERROR("no backlight present per VBT\n");
> +		return 0;
> +	}
> +
> +	panel->backlight.max = CABC_MAX_VALUE;
> +	panel->backlight.level = CABC_MAX_VALUE;
> +
> +	return 0;
> +}
> +
> +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector
> *intel_connector)
> +{
> +	struct drm_device *dev = intel_connector->base.dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_encoder *encoder = intel_connector->encoder;
> +	struct intel_panel *panel = &intel_connector->panel;
> +
> +	if (!dev_priv->vbt.dsi.config->cabc_supported)
> +		return -EINVAL;
> +
> +	if (encoder->type != INTEL_OUTPUT_DSI) {
> +		DRM_ERROR("Use DSI encoder for CABC\n");
> +		return -EINVAL;
> +	}
> +
> +	panel->backlight.setup = cabc_setup_backlight;
> +	panel->backlight.enable = cabc_enable_backlight;
> +	panel->backlight.disable = cabc_disable_backlight;
> +	panel->backlight.set = cabc_set_backlight;
> +	panel->backlight.get = cabc_get_backlight;
> +
> +	return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/intel_panel.c
> b/drivers/gpu/drm/i915/intel_panel.c
> index 21ee647..f29a8f2 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1720,6 +1720,10 @@ intel_panel_init_backlight_funcs(struct
> intel_panel *panel)
>  		container_of(panel, struct intel_connector, panel);
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
> 
> +	if (connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DSI &&
> +			intel_dsi_cabc_init_backlight_funcs(connector) == 0)
> +		return;
> +
>  	if (IS_BROXTON(dev_priv)) {
>  		panel->backlight.setup = bxt_setup_backlight;
>  		panel->backlight.enable = bxt_enable_backlight;
> --
> 1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[PATCH 2/2] drm/i915: CABC support for backlight control

[Deepak M]

In CABC (Content Adaptive Brightness Control) content grey level
scale can be increased while simultaneously decreasing
brightness of the backlight to achieve same perceived brightness.

The CABC is not standardized and panel vendors are free to follow
their implementation. The CABC implementaion here assumes that the
panels use standard SW register for control.

In this design there will be no PWM signal from the SoC and DCS
commands are sent to enable and control the backlight brightness.

v2: Moving the CABC bkl functions to new file.(Jani)

v3: Rebase

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@intel.com>
Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
Signed-off-by: Deepak M <m.deepak@intel.com>
---
 drivers/gpu/drm/i915/Makefile         |   1 +
 drivers/gpu/drm/i915/i915_drv.h       |   2 +-
 drivers/gpu/drm/i915/intel_dsi.c      |  17 +++-
 drivers/gpu/drm/i915/intel_dsi.h      |   4 +
 drivers/gpu/drm/i915/intel_dsi_cabc.c | 179 ++++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_panel.c    |   4 +
 6 files changed, 205 insertions(+), 2 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 0851de07..d5031df 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -81,6 +81,7 @@ i915-y += dvo_ch7017.o \
 	  intel_dp_mst.o \
 	  intel_dp.o \
 	  intel_dsi.o \
+	  intel_dsi_cabc.o \
 	  intel_dsi_panel_vbt.o \
 	  intel_dsi_pll.o \
 	  intel_dvo.o \
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f37ac12..d77eb1f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3501,7 +3501,7 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
 		     enum intel_sbi_destination destination);
 u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
 void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
-
+int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector);
 int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
 int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
 
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 01b8e9f..18ed902 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1170,8 +1170,23 @@ void intel_dsi_init(struct drm_device *dev)
 		intel_dsi->ports = (1 << PORT_C);
 	}
 
-	if (dev_priv->vbt.dsi.config->dual_link)
+	if (dev_priv->vbt.dsi.config->dual_link) {
 		intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
+		switch (dev_priv->vbt.dsi.config->dl_cabc_port) {
+		case CABC_PORT_A:
+			intel_dsi->bkl_dcs_ports = (1 << PORT_A);
+			break;
+		case CABC_PORT_C:
+			intel_dsi->bkl_dcs_ports = (1 << PORT_C);
+			break;
+		case CABC_PORT_A_AND_C:
+			intel_dsi->bkl_dcs_ports = intel_dsi->ports;
+			break;
+		default:
+			DRM_ERROR("Unknown MIPI ports for sending DCS\n");
+		}
+	} else
+		intel_dsi->bkl_dcs_ports = intel_dsi->ports;
 
 	/* Create a DSI host (and a device) for each port. */
 	for_each_dsi_port(port, intel_dsi->ports) {
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index e9fdfec..c51fd22 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -36,6 +36,10 @@
 
 int dsi_pixel_format_bpp(int pixel_format);
 
+#define CABC_PORT_A                     0x00
+#define CABC_PORT_C                     0x01
+#define CABC_PORT_A_AND_C               0x02
+
 struct intel_dsi_host;
 
 struct intel_dsi {
diff --git a/drivers/gpu/drm/i915/intel_dsi_cabc.c b/drivers/gpu/drm/i915/intel_dsi_cabc.c
new file mode 100644
index 0000000..d14a669
--- /dev/null
+++ b/drivers/gpu/drm/i915/intel_dsi_cabc.c
@@ -0,0 +1,179 @@
+/*
+ * Copyright © 2006-2010 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Deepak M <m.deepak at intel.com>
+ */
+
+#include "intel_drv.h"
+#include "intel_dsi.h"
+#include "i915_drv.h"
+#include <drm/drm_mipi_dsi.h>
+
+#define CABC_OFF                        (0 << 0)
+#define CABC_USER_INTERFACE_IMAGE       (1 << 0)
+#define CABC_STILL_PICTURE              (2 << 0)
+#define CABC_VIDEO_MODE                 (3 << 0)
+
+#define CABC_BACKLIGHT                  (1 << 2)
+#define CABC_DIMMING_DISPLAY            (1 << 3)
+#define CABC_BCTRL                      (1 << 5)
+
+#define CABC_MAX_VALUE                  0xFF
+
+#define MIPI_DCS_CABC_LEVEL_RD          0x52
+#define MIPI_DCS_CABC_MIN_BRIGHTNESS_RD 0x5F
+#define MIPI_DCS_CABC_CONTROL_RD        0x56
+#define MIPI_DCS_CABC_CONTROL_BRIGHT_RD 0x54
+#define MIPI_DCS_CABC_LEVEL_WR          0x51
+#define MIPI_DCS_CABC_MIN_BRIGHTNESS_WR 0x5E
+#define MIPI_DCS_CABC_CONTROL_WR        0x55
+#define MIPI_DCS_CABC_CONTROL_BRIGHT_WR 0x53
+
+static u32 cabc_get_backlight(struct intel_connector *connector)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct mipi_dsi_device *dsi_device;
+	u8 data[2] = {0};
+	enum port port;
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		mipi_dsi_dcs_read(dsi_device, MIPI_DCS_CABC_LEVEL_RD, data, 2);
+	}
+
+	return data[1];
+}
+
+static void cabc_set_backlight(struct intel_connector *connector, u32 level)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct mipi_dsi_device *dsi_device;
+	u8 data[2] = {0};
+	enum port port;
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data[1] = level;
+		data[0] = MIPI_DCS_CABC_LEVEL_WR;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+	}
+}
+
+static void cabc_disable_backlight(struct intel_connector *connector)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct mipi_dsi_device *dsi_device;
+	enum port port;
+	u8 data[2] = {0};
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	cabc_set_backlight(connector, 0);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data[1] = CABC_OFF;
+		data[0] = MIPI_DCS_CABC_CONTROL_WR;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+	}
+}
+
+static void cabc_enable_backlight(struct intel_connector *connector)
+{
+	struct intel_dsi *intel_dsi = NULL;
+	struct intel_encoder *encoder = NULL;
+	struct intel_panel *panel = &connector->panel;
+	struct mipi_dsi_device *dsi_device;
+	enum port port;
+	u8 data[2] = {0};
+
+	encoder = connector->encoder;
+	intel_dsi = enc_to_intel_dsi(&encoder->base);
+
+	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
+		dsi_device = intel_dsi->dsi_hosts[port]->device;
+		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
+		data[1] = CABC_BACKLIGHT | CABC_DIMMING_DISPLAY | CABC_BCTRL;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+		data[0] = MIPI_DCS_CABC_CONTROL_WR;
+		data[1] = CABC_STILL_PICTURE;
+		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
+	}
+
+	cabc_set_backlight(connector, panel->backlight.level);
+}
+
+static int cabc_setup_backlight(struct intel_connector *connector,
+		enum pipe unused)
+{
+	struct drm_device *dev = connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_panel *panel = &connector->panel;
+
+	if (dev_priv->vbt.backlight.present)
+		panel->backlight.present = true;
+	else {
+		DRM_ERROR("no backlight present per VBT\n");
+		return 0;
+	}
+
+	panel->backlight.max = CABC_MAX_VALUE;
+	panel->backlight.level = CABC_MAX_VALUE;
+
+	return 0;
+}
+
+int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector)
+{
+	struct drm_device *dev = intel_connector->base.dev;
+	struct drm_i915_private *dev_priv = dev->dev_private;
+	struct intel_encoder *encoder = intel_connector->encoder;
+	struct intel_panel *panel = &intel_connector->panel;
+
+	if (!dev_priv->vbt.dsi.config->cabc_supported)
+		return -EINVAL;
+
+	if (encoder->type != INTEL_OUTPUT_DSI) {
+		DRM_ERROR("Use DSI encoder for CABC\n");
+		return -EINVAL;
+	}
+
+	panel->backlight.setup = cabc_setup_backlight;
+	panel->backlight.enable = cabc_enable_backlight;
+	panel->backlight.disable = cabc_disable_backlight;
+	panel->backlight.set = cabc_set_backlight;
+	panel->backlight.get = cabc_get_backlight;
+
+	return 0;
+}
diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
index 0fe059b..212f242 100644
--- a/drivers/gpu/drm/i915/intel_panel.c
+++ b/drivers/gpu/drm/i915/intel_panel.c
@@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
 		container_of(panel, struct intel_connector, panel);
 	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 
+	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
+			intel_dsi_cabc_init_backlight_funcs(connector) == 0)
+		return;
+
 	if (IS_BROXTON(dev_priv)) {
 		panel->backlight.setup = bxt_setup_backlight;
 		panel->backlight.enable = bxt_enable_backlight;
-- 
1.9.1

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✗ Fi.CI.BAT: warning for CABC patch list (rev3)

[Patchwork]

== Series Details ==

Series: CABC patch list (rev3)
URL   : https://patchwork.freedesktop.org/series/801/
State : warning

== Summary ==

Series 801v3 CABC patch list
http://patchwork.freedesktop.org/api/1.0/series/801/revisions/3/mbox/

Test gem_mmap_gtt:
        Subgroup basic-write-gtt:
                pass       -> DMESG-WARN (skl-i5k-2)
Test gem_ringfill:
        Subgroup basic-default:
                pass       -> DMESG-WARN (skl-i5k-2)
Test gem_sync:
        Subgroup basic-all:
                pass       -> DMESG-WARN (skl-i5k-2)
Test kms_flip:
        Subgroup basic-flip-vs-dpms:
                pass       -> DMESG-WARN (bdw-ultra)
Test kms_force_connector_basic:
        Subgroup force-load-detect:
                pass       -> DMESG-WARN (snb-x220t)
Test kms_pipe_crc_basic:
        Subgroup nonblocking-crc-pipe-a:
                dmesg-warn -> PASS       (snb-x220t)
        Subgroup read-crc-pipe-b:
                dmesg-warn -> PASS       (hsw-gt2)
        Subgroup read-crc-pipe-c-frame-sequence:
                pass       -> DMESG-WARN (hsw-brixbox)
        Subgroup suspend-read-crc-pipe-c:
                pass       -> DMESG-WARN (bsw-nuc-2)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                dmesg-fail -> FAIL       (snb-x220t)
                pass       -> DMESG-WARN (hsw-brixbox)

bdw-nuci7        total:183  pass:172  dwarn:0   dfail:0   fail:0   skip:11 
bdw-ultra        total:183  pass:164  dwarn:1   dfail:0   fail:0   skip:18 
bsw-nuc-2        total:183  pass:148  dwarn:1   dfail:0   fail:0   skip:34 
byt-nuc          total:183  pass:152  dwarn:0   dfail:0   fail:0   skip:31 
hsw-brixbox      total:183  pass:162  dwarn:2   dfail:0   fail:0   skip:19 
hsw-gt2          total:183  pass:169  dwarn:0   dfail:0   fail:0   skip:14 
ilk-hp8440p      total:183  pass:125  dwarn:0   dfail:0   fail:0   skip:58 
ivb-t430s        total:183  pass:162  dwarn:0   dfail:0   fail:0   skip:21 
skl-i5k-2        total:183  pass:160  dwarn:3   dfail:0   fail:0   skip:20 
skl-i7k-2        total:183  pass:163  dwarn:0   dfail:0   fail:0   skip:20 
snb-dellxps      total:183  pass:153  dwarn:1   dfail:0   fail:0   skip:29 
snb-x220t        total:183  pass:153  dwarn:1   dfail:0   fail:1   skip:28 

Results at /archive/results/CI_IGT_test/Patchwork_1540/

c4b2696531e375d94d135fc5e5e7b3072d92f141 drm-intel-nightly: 2016y-03m-08d-09h-54m-48s UTC integration manifest
b4e68392b1af0f685434c084f922918f8ed63f8b drm/i915: CABC support for backlight control
68077d77f7ae0adde4ca1b1390ee0f7ad4125ddb drm/i915: Parsing the PWM cntrl and CABC ON/OFF fileds in VBT

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Re: [PATCH 2/2] drm/i915: CABC support for backlight control

[Jani Nikula]

On Tue, 08 Mar 2016, Deepak M <m.deepak@intel.com> wrote:
> In CABC (Content Adaptive Brightness Control) content grey level
> scale can be increased while simultaneously decreasing
> brightness of the backlight to achieve same perceived brightness.
>
> The CABC is not standardized and panel vendors are free to follow
> their implementation. The CABC implementaion here assumes that the
> panels use standard SW register for control.
>
> In this design there will be no PWM signal from the SoC and DCS
> commands are sent to enable and control the backlight brightness.
>
> v2: Moving the CABC bkl functions to new file.(Jani)
>
> v3: Rebase

This no longer applies to current nightly. Please rebase and post both
patches.

BR,
Jani.



>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Daniel Vetter <daniel.vetter@intel.com>
> Cc: Yetunde Adebisi <yetundex.adebisi@intel.com>
> Signed-off-by: Deepak M <m.deepak@intel.com>
> ---
>  drivers/gpu/drm/i915/Makefile         |   1 +
>  drivers/gpu/drm/i915/i915_drv.h       |   2 +-
>  drivers/gpu/drm/i915/intel_dsi.c      |  17 +++-
>  drivers/gpu/drm/i915/intel_dsi.h      |   4 +
>  drivers/gpu/drm/i915/intel_dsi_cabc.c | 179 ++++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_panel.c    |   4 +
>  6 files changed, 205 insertions(+), 2 deletions(-)
>  create mode 100644 drivers/gpu/drm/i915/intel_dsi_cabc.c
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index 0851de07..d5031df 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -81,6 +81,7 @@ i915-y += dvo_ch7017.o \
>  	  intel_dp_mst.o \
>  	  intel_dp.o \
>  	  intel_dsi.o \
> +	  intel_dsi_cabc.o \
>  	  intel_dsi_panel_vbt.o \
>  	  intel_dsi_pll.o \
>  	  intel_dvo.o \
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f37ac12..d77eb1f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3501,7 +3501,7 @@ void intel_sbi_write(struct drm_i915_private *dev_priv, u16 reg, u32 value,
>  		     enum intel_sbi_destination destination);
>  u32 vlv_flisdsi_read(struct drm_i915_private *dev_priv, u32 reg);
>  void vlv_flisdsi_write(struct drm_i915_private *dev_priv, u32 reg, u32 val);
> -
> +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector);
>  int intel_gpu_freq(struct drm_i915_private *dev_priv, int val);
>  int intel_freq_opcode(struct drm_i915_private *dev_priv, int val);
>  
> diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
> index 01b8e9f..18ed902 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/intel_dsi.c
> @@ -1170,8 +1170,23 @@ void intel_dsi_init(struct drm_device *dev)
>  		intel_dsi->ports = (1 << PORT_C);
>  	}
>  
> -	if (dev_priv->vbt.dsi.config->dual_link)
> +	if (dev_priv->vbt.dsi.config->dual_link) {
>  		intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
> +		switch (dev_priv->vbt.dsi.config->dl_cabc_port) {
> +		case CABC_PORT_A:
> +			intel_dsi->bkl_dcs_ports = (1 << PORT_A);
> +			break;
> +		case CABC_PORT_C:
> +			intel_dsi->bkl_dcs_ports = (1 << PORT_C);
> +			break;
> +		case CABC_PORT_A_AND_C:
> +			intel_dsi->bkl_dcs_ports = intel_dsi->ports;
> +			break;
> +		default:
> +			DRM_ERROR("Unknown MIPI ports for sending DCS\n");
> +		}
> +	} else
> +		intel_dsi->bkl_dcs_ports = intel_dsi->ports;
>  
>  	/* Create a DSI host (and a device) for each port. */
>  	for_each_dsi_port(port, intel_dsi->ports) {
> diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
> index e9fdfec..c51fd22 100644
> --- a/drivers/gpu/drm/i915/intel_dsi.h
> +++ b/drivers/gpu/drm/i915/intel_dsi.h
> @@ -36,6 +36,10 @@
>  
>  int dsi_pixel_format_bpp(int pixel_format);
>  
> +#define CABC_PORT_A                     0x00
> +#define CABC_PORT_C                     0x01
> +#define CABC_PORT_A_AND_C               0x02
> +
>  struct intel_dsi_host;
>  
>  struct intel_dsi {
> diff --git a/drivers/gpu/drm/i915/intel_dsi_cabc.c b/drivers/gpu/drm/i915/intel_dsi_cabc.c
> new file mode 100644
> index 0000000..d14a669
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/intel_dsi_cabc.c
> @@ -0,0 +1,179 @@
> +/*
> + * Copyright © 2006-2010 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
> + * DEALINGS IN THE SOFTWARE.
> + *
> + * Author: Deepak M <m.deepak at intel.com>
> + */
> +
> +#include "intel_drv.h"
> +#include "intel_dsi.h"
> +#include "i915_drv.h"
> +#include <drm/drm_mipi_dsi.h>
> +
> +#define CABC_OFF                        (0 << 0)
> +#define CABC_USER_INTERFACE_IMAGE       (1 << 0)
> +#define CABC_STILL_PICTURE              (2 << 0)
> +#define CABC_VIDEO_MODE                 (3 << 0)
> +
> +#define CABC_BACKLIGHT                  (1 << 2)
> +#define CABC_DIMMING_DISPLAY            (1 << 3)
> +#define CABC_BCTRL                      (1 << 5)
> +
> +#define CABC_MAX_VALUE                  0xFF
> +
> +#define MIPI_DCS_CABC_LEVEL_RD          0x52
> +#define MIPI_DCS_CABC_MIN_BRIGHTNESS_RD 0x5F
> +#define MIPI_DCS_CABC_CONTROL_RD        0x56
> +#define MIPI_DCS_CABC_CONTROL_BRIGHT_RD 0x54
> +#define MIPI_DCS_CABC_LEVEL_WR          0x51
> +#define MIPI_DCS_CABC_MIN_BRIGHTNESS_WR 0x5E
> +#define MIPI_DCS_CABC_CONTROL_WR        0x55
> +#define MIPI_DCS_CABC_CONTROL_BRIGHT_WR 0x53
> +
> +static u32 cabc_get_backlight(struct intel_connector *connector)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct mipi_dsi_device *dsi_device;
> +	u8 data[2] = {0};
> +	enum port port;
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		mipi_dsi_dcs_read(dsi_device, MIPI_DCS_CABC_LEVEL_RD, data, 2);
> +	}
> +
> +	return data[1];
> +}
> +
> +static void cabc_set_backlight(struct intel_connector *connector, u32 level)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct mipi_dsi_device *dsi_device;
> +	u8 data[2] = {0};
> +	enum port port;
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		data[1] = level;
> +		data[0] = MIPI_DCS_CABC_LEVEL_WR;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +	}
> +}
> +
> +static void cabc_disable_backlight(struct intel_connector *connector)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct mipi_dsi_device *dsi_device;
> +	enum port port;
> +	u8 data[2] = {0};
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	cabc_set_backlight(connector, 0);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		data[1] = CABC_OFF;
> +		data[0] = MIPI_DCS_CABC_CONTROL_WR;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +	}
> +}
> +
> +static void cabc_enable_backlight(struct intel_connector *connector)
> +{
> +	struct intel_dsi *intel_dsi = NULL;
> +	struct intel_encoder *encoder = NULL;
> +	struct intel_panel *panel = &connector->panel;
> +	struct mipi_dsi_device *dsi_device;
> +	enum port port;
> +	u8 data[2] = {0};
> +
> +	encoder = connector->encoder;
> +	intel_dsi = enc_to_intel_dsi(&encoder->base);
> +
> +	for_each_dsi_port(port, intel_dsi->bkl_dcs_ports) {
> +		dsi_device = intel_dsi->dsi_hosts[port]->device;
> +		data[0] = MIPI_DCS_CABC_CONTROL_BRIGHT_WR;
> +		data[1] = CABC_BACKLIGHT | CABC_DIMMING_DISPLAY | CABC_BCTRL;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +		data[0] = MIPI_DCS_CABC_CONTROL_WR;
> +		data[1] = CABC_STILL_PICTURE;
> +		mipi_dsi_dcs_write_buffer(dsi_device, data, 2);
> +	}
> +
> +	cabc_set_backlight(connector, panel->backlight.level);
> +}
> +
> +static int cabc_setup_backlight(struct intel_connector *connector,
> +		enum pipe unused)
> +{
> +	struct drm_device *dev = connector->base.dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_panel *panel = &connector->panel;
> +
> +	if (dev_priv->vbt.backlight.present)
> +		panel->backlight.present = true;
> +	else {
> +		DRM_ERROR("no backlight present per VBT\n");
> +		return 0;
> +	}
> +
> +	panel->backlight.max = CABC_MAX_VALUE;
> +	panel->backlight.level = CABC_MAX_VALUE;
> +
> +	return 0;
> +}
> +
> +int intel_dsi_cabc_init_backlight_funcs(struct intel_connector *intel_connector)
> +{
> +	struct drm_device *dev = intel_connector->base.dev;
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_encoder *encoder = intel_connector->encoder;
> +	struct intel_panel *panel = &intel_connector->panel;
> +
> +	if (!dev_priv->vbt.dsi.config->cabc_supported)
> +		return -EINVAL;
> +
> +	if (encoder->type != INTEL_OUTPUT_DSI) {
> +		DRM_ERROR("Use DSI encoder for CABC\n");
> +		return -EINVAL;
> +	}
> +
> +	panel->backlight.setup = cabc_setup_backlight;
> +	panel->backlight.enable = cabc_enable_backlight;
> +	panel->backlight.disable = cabc_disable_backlight;
> +	panel->backlight.set = cabc_set_backlight;
> +	panel->backlight.get = cabc_get_backlight;
> +
> +	return 0;
> +}
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index 0fe059b..212f242 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -1718,6 +1718,10 @@ intel_panel_init_backlight_funcs(struct intel_panel *panel)
>  		container_of(panel, struct intel_connector, panel);
>  	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
>  
> +	if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
> +			intel_dsi_cabc_init_backlight_funcs(connector) == 0)
> +		return;
> +
>  	if (IS_BROXTON(dev_priv)) {
>  		panel->backlight.setup = bxt_setup_backlight;
>  		panel->backlight.enable = bxt_enable_backlight;

-- 
Jani Nikula, Intel Open Source Technology Center
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