From mboxrd@z Thu Jan 1 00:00:00 1970 From: tom.orourke@intel.com Subject: [PATCH 09/26] drm/i915/slpc: Setup rps frequency values during SLPC init Date: Tue, 8 Mar 2016 16:34:12 -0800 Message-ID: <1457483669-155235-10-git-send-email-tom.orourke@intel.com> References: <1457483669-155235-1-git-send-email-tom.orourke@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTP id DFBD06E7AC for ; Wed, 9 Mar 2016 00:35:06 +0000 (UTC) In-Reply-To: <1457483669-155235-1-git-send-email-tom.orourke@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: intel-gfx@lists.freedesktop.org Cc: paulo.r.zanoni@intel.com, Tom O'Rourke List-Id: intel-gfx@lists.freedesktop.org RnJvbTogVG9tIE8nUm91cmtlIDxUb20uTydSb3Vya2VAaW50ZWwuY29tPgoKdjI6IEFkZCBtdXRl eCBsb2NrL3VubG9jawoKU2lnbmVkLW9mZi1ieTogVG9tIE8nUm91cmtlIDxUb20uTydSb3Vya2VA aW50ZWwuY29tPgotLS0KIGRyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rydi5oICB8IDEgKwog ZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYyAgIHwgMiArLQogZHJpdmVycy9ncHUvZHJt L2k5MTUvaW50ZWxfc2xwYy5jIHwgNSArKysrKwogMyBmaWxlcyBjaGFuZ2VkLCA3IGluc2VydGlv bnMoKyksIDEgZGVsZXRpb24oLSkKCmRpZmYgLS1naXQgYS9kcml2ZXJzL2dwdS9kcm0vaTkxNS9p bnRlbF9kcnYuaCBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rydi5oCmluZGV4IDcyNGM0 ODIuLmY5NjcwYjkgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rydi5o CisrKyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2Rydi5oCkBAIC0xNjA4LDYgKzE2MDgs NyBAQCB2b2lkIGludGVsX2luaXRfcG0oc3RydWN0IGRybV9kZXZpY2UgKmRldik7CiB2b2lkIGlu dGVsX3BtX3NldHVwKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpOwogdm9pZCBpbnRlbF9ncHVfaXBz X2luaXQoc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRldl9wcml2KTsKIHZvaWQgaW50ZWxfZ3B1 X2lwc190ZWFyZG93bih2b2lkKTsKK3ZvaWQgZ2VuNl9pbml0X3Jwc19mcmVxdWVuY2llcyhzdHJ1 Y3QgZHJtX2RldmljZSAqZGV2KTsKIHZvaWQgaW50ZWxfaW5pdF9ndF9wb3dlcnNhdmUoc3RydWN0 IGRybV9kZXZpY2UgKmRldik7CiB2b2lkIGludGVsX2NsZWFudXBfZ3RfcG93ZXJzYXZlKHN0cnVj dCBkcm1fZGV2aWNlICpkZXYpOwogdm9pZCBpbnRlbF9lbmFibGVfZ3RfcG93ZXJzYXZlKHN0cnVj dCBkcm1fZGV2aWNlICpkZXYpOwpkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50 ZWxfcG0uYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3BtLmMKaW5kZXggMDVkYjYzYS4u ZTZkZWM5NyAxMDA2NDQKLS0tIGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfcG0uYworKysg Yi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9wbS5jCkBAIC00NzEyLDcgKzQ3MTIsNyBAQCBp bnQgaW50ZWxfZW5hYmxlX3JjNihjb25zdCBzdHJ1Y3QgZHJtX2RldmljZSAqZGV2KQogCXJldHVy biBpOTE1LmVuYWJsZV9yYzY7CiB9CiAKLXN0YXRpYyB2b2lkIGdlbjZfaW5pdF9ycHNfZnJlcXVl bmNpZXMoc3RydWN0IGRybV9kZXZpY2UgKmRldikKK3ZvaWQgZ2VuNl9pbml0X3Jwc19mcmVxdWVu Y2llcyhzdHJ1Y3QgZHJtX2RldmljZSAqZGV2KQogewogCXN0cnVjdCBkcm1faTkxNV9wcml2YXRl ICpkZXZfcHJpdiA9IGRldi0+ZGV2X3ByaXZhdGU7CiAJdWludDMyX3QgcnBfc3RhdGVfY2FwOwpk aWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL2k5MTUvaW50ZWxfc2xwYy5jIGIvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfc2xwYy5jCmluZGV4IDQ2ODllNzAuLjNmOWY1NmMgMTAwNjQ0Ci0t LSBhL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX3NscGMuYworKysgYi9kcml2ZXJzL2dwdS9k cm0vaTkxNS9pbnRlbF9zbHBjLmMKQEAgLTkyLDYgKzkyLDExIEBAIHZvaWQgaW50ZWxfc2xwY19p bml0KHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpCiAJc3RydWN0IGRybV9pOTE1X3ByaXZhdGUgKmRl dl9wcml2ID0gZGV2LT5kZXZfcHJpdmF0ZTsKIAlzdHJ1Y3QgZHJtX2k5MTVfZ2VtX29iamVjdCAq b2JqOwogCisJLyogSW5pdGlhbGl6ZSB0aGUgcnBzIGZyZXF1ZWNueSB2YWx1ZXMgKi8KKwltdXRl eF9sb2NrKCZkZXZfcHJpdi0+cnBzLmh3X2xvY2spOworCWdlbjZfaW5pdF9ycHNfZnJlcXVlbmNp ZXMoZGV2KTsKKwltdXRleF91bmxvY2soJmRldl9wcml2LT5ycHMuaHdfbG9jayk7CisKIAkvKiBB bGxvY2F0ZSBzaGFyZWQgZGF0YSBzdHJ1Y3R1cmUgKi8KIAlvYmogPSBkZXZfcHJpdi0+Z3VjLnNs cGMuc2hhcmVkX2RhdGFfb2JqOwogCWlmICghb2JqKSB7Ci0tIAoxLjkuMQoKX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlz dApJbnRlbC1nZnhAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0 b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4Cg==