[PATCH 1/7] drm/i915: Add comments marking the start of load time init phases

[Imre Deak <imre.deak@intel.com>]

To make it easier to get init time dependencies right during driver
loading, define the following init phases:
- state init not requiring device access
- minimal HW setup to enable MMIO access to the device
- state init requiring device access

In the future the 3rd phase could be fine-grained further for example:
- state init requiring device access w/o side effects
  (i.e. read-only HW access, no interface registrations)
- state init causing device side effects
  (i.e any HW access, no interface registration)
- registering all interfaces

Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 4aa3db6..d3dc4d4 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -991,6 +991,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	int ret = 0;
 	uint32_t aperture_size;
 
+	/* Init phase: setup state not requiring accessing the device. */
 	info = (struct intel_device_info *) flags;
 
 	dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
@@ -1036,6 +1037,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 		DRM_INFO("This is an early pre-production Haswell machine. "
 			 "It may not be fully functional.\n");
 
+	/* Init phase: setup device MMIO */
 	if (i915_get_bridge_dev(dev)) {
 		ret = -EIO;
 		goto out_runtime_pm_put;
@@ -1050,6 +1052,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
 	intel_uncore_init(dev);
 
+	/* Init phase: setup state requiring accessing the device. */
 	ret = i915_gem_gtt_init(dev);
 	if (ret)
 		goto out_uncore_fini;
-- 
2.5.0

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