[PATCH v2] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave

[PATCH v2] drm/i915/gen9: add WaClearFlowControlGpgpuContextSave

[tim.gore]

From: Tim Gore <tim.gore@intel.com>

This allows writes to EU flow control registers. Together
with SIP code from the user-mode driver this resolves a
hang seen in some pre-emption scenarios. Note that this
patch is just the kernel mode part of this workaround.

v2. Oops, add FLOW_CONTROL_ENABLE macro to i915_reg.h.

Signed-off-by: Tim Gore <tim.gore@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h         | 1 +
 drivers/gpu/drm/i915/intel_ringbuffer.c | 2 ++
 2 files changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 7dfc400..58dcf01 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -7103,6 +7103,7 @@ enum skl_disp_power_wells {
 #define   GEN9_CCS_TLB_PREFETCH_ENABLE	(1<<3)
 
 #define GEN8_ROW_CHICKEN		_MMIO(0xe4f0)
+#define   FLOW_CONTROL_ENABLE		(1<<15)
 #define   PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE	(1<<8)
 #define   STALL_DOP_GATING_DISABLE		(1<<5)
 
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 45ce45a..83ab25a 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -920,8 +920,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring)
 	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
 		   ECOCHK_DIS_TLB);
 
+	/* WaClearFlowControlGpgpuContextSave:skl,bxt */
 	/* WaDisablePartialInstShootdown:skl,bxt */
 	WA_SET_BIT_MASKED(GEN8_ROW_CHICKEN,
+			  FLOW_CONTROL_ENABLE |
 			  PARTIAL_INSTRUCTION_SHOOTDOWN_DISABLE);
 
 	/* Syncing dependencies between camera and graphics:skl,bxt */
-- 
1.9.1

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✗ Fi.CI.BAT: warning for drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915/gen9: add WaClearFlowControlGpgpuContextSave (rev2)
URL   : https://patchwork.freedesktop.org/series/4272/
State : warning

== Summary ==

Series 4272v2 drm/i915/gen9: add WaClearFlowControlGpgpuContextSave
http://patchwork.freedesktop.org/api/1.0/series/4272/revisions/2/mbox/

Test drv_module_reload_basic:
                dmesg-warn -> PASS       (ilk-hp8440p)
Test kms_flip:
        Subgroup basic-flip-vs-modeset:
                dmesg-warn -> PASS       (bdw-ultra)
        Subgroup basic-flip-vs-wf_vblank:
                pass       -> DMESG-WARN (hsw-brixbox)
Test kms_pipe_crc_basic:
        Subgroup nonblocking-crc-pipe-b-frame-sequence:
                pass       -> DMESG-WARN (hsw-gt2)
                dmesg-warn -> PASS       (hsw-brixbox)
        Subgroup suspend-read-crc-pipe-c:
                pass       -> SKIP       (hsw-brixbox)
Test pm_rpm:
        Subgroup basic-pci-d3-state:
                pass       -> DMESG-WARN (hsw-brixbox)

bdw-nuci7        total:193  pass:181  dwarn:0   dfail:0   fail:0   skip:12 
bdw-ultra        total:193  pass:172  dwarn:0   dfail:0   fail:0   skip:21 
bsw-nuc-2        total:193  pass:155  dwarn:1   dfail:0   fail:0   skip:37 
byt-nuc          total:193  pass:158  dwarn:0   dfail:0   fail:0   skip:35 
hsw-brixbox      total:193  pass:168  dwarn:2   dfail:0   fail:0   skip:23 
hsw-gt2          total:193  pass:174  dwarn:2   dfail:0   fail:0   skip:17 
ilk-hp8440p      total:193  pass:130  dwarn:0   dfail:0   fail:0   skip:63 
skl-i5k-2        total:193  pass:170  dwarn:0   dfail:0   fail:0   skip:23 
skl-i7k-2        total:193  pass:170  dwarn:0   dfail:0   fail:0   skip:23 
snb-dellxps      total:193  pass:158  dwarn:1   dfail:0   fail:0   skip:34 

Results at /archive/results/CI_IGT_test/Patchwork_1552/

ab403b26610034afe0e0c97d960782bad98b97d0 drm-intel-nightly: 2016y-03m-09d-09h-25m-31s UTC integration manifest
b45861404ef31f09fbeedb2b0d28a5f34e307cf2 drm/i915/gen9: add WaClearFlowControlGpgpuContextSave

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