intel-gfx.lists.freedesktop.org archive mirror
 help / color / mirror / Atom feed
From: Ander Conselvan De Oliveira <conselvan2@gmail.com>
To: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 10/15] drm/i915: Move fp divisor calculation into ironlake_compute_dpll()
Date: Tue, 22 Mar 2016 15:22:26 +0200	[thread overview]
Message-ID: <1458652946.2716.2.camel@gmail.com> (raw)
In-Reply-To: <20160322124911.GK4329@intel.com>

On Tue, 2016-03-22 at 14:49 +0200, Ville Syrjälä wrote:
> On Mon, Mar 21, 2016 at 06:00:11PM +0200, Ander Conselvan de Oliveira wrote:
> > Follow what is done in i8xx_compute_dpll() and i9xx_compute_dpll() and
> > move the lower level details of setting crtc_state->dpll_hw_state into
> > the _compute_dpll() function.
> 
> Missing sob.

Oops,

Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>


> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> > ---
> >  drivers/gpu/drm/i915/intel_display.c | 45 ++++++++++++++++++---------------
> > ---
> >  1 file changed, 22 insertions(+), 23 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/intel_display.c
> > b/drivers/gpu/drm/i915/intel_display.c
> > index 0b6eabf..b6541a0 100644
> > --- a/drivers/gpu/drm/i915/intel_display.c
> > +++ b/drivers/gpu/drm/i915/intel_display.c
> > @@ -8821,10 +8821,9 @@ static bool ironlake_needs_fb_cb_tune(struct dpll
> > *dpll, int factor)
> >  	return i9xx_dpll_compute_m(dpll) < factor * dpll->n;
> >  }
> >  
> > -static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
> > -				      struct intel_crtc_state *crtc_state,
> > -				      u32 *fp,
> > -				      intel_clock_t *reduced_clock, u32
> > *fp2)
> > +static void ironlake_compute_dpll(struct intel_crtc *intel_crtc,
> > +				  struct intel_crtc_state *crtc_state,
> > +				  intel_clock_t *reduced_clock)
> >  {
> >  	struct drm_crtc *crtc = &intel_crtc->base;
> >  	struct drm_device *dev = crtc->dev;
> > @@ -8833,7 +8832,7 @@ static uint32_t ironlake_compute_dpll(struct
> > intel_crtc *intel_crtc,
> >  	struct drm_connector *connector;
> >  	struct drm_connector_state *connector_state;
> >  	struct intel_encoder *encoder;
> > -	uint32_t dpll;
> > +	u32 dpll, fp, fp2;
> >  	int factor, i;
> >  	bool is_lvds = false, is_sdvo = false;
> >  
> > @@ -8866,11 +8865,19 @@ static uint32_t ironlake_compute_dpll(struct
> > intel_crtc *intel_crtc,
> >  	} else if (crtc_state->sdvo_tv_clock)
> >  		factor = 20;
> >  
> > +	fp = i9xx_dpll_compute_fp(&crtc_state->dpll);
> > +
> >  	if (ironlake_needs_fb_cb_tune(&crtc_state->dpll, factor))
> > -		*fp |= FP_CB_TUNE;
> > +		fp |= FP_CB_TUNE;
> > +
> > +	if (reduced_clock) {
> > +		fp2 = i9xx_dpll_compute_fp(reduced_clock);
> >  
> > -	if (fp2 && (reduced_clock->m < factor * reduced_clock->n))
> > -		*fp2 |= FP_CB_TUNE;
> > +		if (reduced_clock->m < factor * reduced_clock->n)
> > +			fp2 |= FP_CB_TUNE;
> > +	} else {
> > +		fp2 = fp;
> > +	}
> >  
> >  	dpll = 0;
> >  
> > @@ -8912,14 +8919,17 @@ static uint32_t ironlake_compute_dpll(struct
> > intel_crtc *intel_crtc,
> >  	else
> >  		dpll |= PLL_REF_INPUT_DREFCLK;
> >  
> > -	return dpll | DPLL_VCO_ENABLE;
> > +	dpll |= DPLL_VCO_ENABLE;
> > +
> > +	crtc_state->dpll_hw_state.dpll = dpll;
> > +	crtc_state->dpll_hw_state.fp0 = fp;
> > +	crtc_state->dpll_hw_state.fp1 = fp2;
> >  }
> >  
> >  static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
> >  				       struct intel_crtc_state *crtc_state)
> >  {
> >  	intel_clock_t reduced_clock;
> > -	u32 dpll = 0, fp = 0, fp2 = 0;
> >  	bool has_reduced_clock = false;
> >  	struct intel_shared_dpll *pll;
> >  
> > @@ -8941,19 +8951,8 @@ static int ironlake_crtc_compute_clock(struct
> > intel_crtc *crtc,
> >  		return -EINVAL;
> >  	}
> >  
> > -	fp = i9xx_dpll_compute_fp(&crtc_state->dpll);
> > -	if (has_reduced_clock)
> > -		fp2 = i9xx_dpll_compute_fp(&reduced_clock);
> > -	else
> > -		fp2 = fp;
> > -
> > -	dpll = ironlake_compute_dpll(crtc, crtc_state,
> > -				     &fp, &reduced_clock,
> > -				     has_reduced_clock ? &fp2 : NULL);
> > -
> > -	crtc_state->dpll_hw_state.dpll = dpll;
> > -	crtc_state->dpll_hw_state.fp0 = fp;
> > -	crtc_state->dpll_hw_state.fp1 = fp2;
> > +	ironlake_compute_dpll(crtc, crtc_state,
> > +			      has_reduced_clock ? &reduced_clock : NULL);
> >  
> >  	pll = intel_get_shared_dpll(crtc, crtc_state, NULL);
> >  	if (pll == NULL) {
> > -- 
> > 2.4.3
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-03-22 13:22 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-03-21 16:00 [PATCH v3 00/15] Clean up ironlake clock computation code Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 01/15] drm/i915: Remove checks for cloned config with LVDS in dpll code Ander Conselvan de Oliveira
2016-03-22 10:11   ` Ville Syrjälä
2016-03-21 16:00 ` [PATCH 02/15] drm/i915: Merge ironlake_get_refclk() into its only caller Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 03/15] drm/i915: Fold intel_ironlake_limit() into clock computation function Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 04/15] drm/i915: Call g4x_find_best_dpll() directly from ILK+ code Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 05/15] drm/i915: Simplify ironlake reduced clock logic a bit Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 06/15] drm/i915: Don't calculate a new clock in ILK+ code if it is already set Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 07/15] drm/i915: Remove PCH type checks from ironlake_crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 08/15] drm/i915: Simplify ironlake_crtc_compute_clock() CPU eDP case Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 09/15] drm/i915: Pass crtc_state->dpll directly to ->find_dpll() Ander Conselvan de Oliveira
2016-03-22 10:18   ` Ville Syrjälä
2016-03-21 16:00 ` [PATCH 10/15] drm/i915: Move fp divisor calculation into ironlake_compute_dpll() Ander Conselvan de Oliveira
2016-03-22 12:49   ` Ville Syrjälä
2016-03-22 13:22     ` Ander Conselvan De Oliveira [this message]
2016-03-21 16:00 ` [PATCH 11/15] drm/i915: Merge ironlake_compute_clocks() and ironlake_crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-22 12:51   ` Ville Syrjälä
2016-03-21 16:00 ` [PATCH 12/15] drm/i915: Split CHV and VLV specific crtc_compute_clock() hooks Ander Conselvan de Oliveira
2016-03-22 10:26   ` Ville Syrjälä
2016-03-21 16:00 ` [PATCH 13/15] drm/i915: Split gen2_crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-22 10:24   ` Ville Syrjälä
2016-03-22 11:11     ` Daniel Vetter
2016-03-22 13:35       ` [PATCH v2 13/15] drm/i915: Split i8xx_crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-21 16:00 ` [PATCH 14/15] drm/i915: Split g4x_crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-22 12:52   ` Ville Syrjälä
2016-03-21 16:00 ` [PATCH 15/15] drm/i915: Split PNV version of crtc_compute_clock() Ander Conselvan de Oliveira
2016-03-22 12:55   ` Ville Syrjälä
2016-03-22  9:33 ` ✗ Fi.CI.BAT: warning for Clean up ironlake clock computation code (rev3) Patchwork
2016-03-22 14:32 ` ✓ Fi.CI.BAT: success for Clean up ironlake clock computation code (rev4) Patchwork
2016-03-23 12:26   ` Ander Conselvan De Oliveira

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1458652946.2716.2.camel@gmail.com \
    --to=conselvan2@gmail.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).